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- /*
- * non inline function forms of trap bindings for gcc, both
- * 16 and 32 bit ints.
- * see discussions in osbind.h and Changelog.
- *
- * ++jrb bammi@dsrgsun.ces.cwru.edu
- */
- #ifndef __NO_INLINE__
- # define __NO_INLINE__
- #endif
- #include <osbind.h>
-
- long trap_1_w(short n)
- {
- register long retvalue __asm__("d0");
-
- __asm__ volatile
- ("
- movw %1,sp@-;
- trap #1;
- addqw #2,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_ww(short n, short a)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
-
- __asm__ volatile
- ("
- movw %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addqw #4,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_wl(short n, long a)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
-
- __asm__ volatile
- ("
- movl %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_wlw(short n, long a, short b)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- short _b = (b);
-
- __asm__ volatile
- ("
- movw %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addqw #8,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_wwll(short n, short a, long b, long c)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- long _b = (b);
- long _c = (c);
-
- __asm__ volatile
- ("
- movl %4,sp@-;
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addw #12,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_wlww(short n, long a, short b, short c)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- short _b = (b);
- short _c = (c);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movw %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addw #10,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_www(short n, short a, short b)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- short _b = (b);
-
- __asm__ volatile
- ("
- movw %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_wll(short n, long a, long b)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
-
- __asm__ volatile
- ("
- movl %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #1;
- addw #10,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_1_wwlll(short n, short a, long b, long c, long d)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- long _b = (b);
- long _c = (c);
- long _d = (d);
-
- __asm__ volatile
- ("
- movl %4,sp@-;
- movl %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs */
- );
- /* no more than 5 operand allowed in asm() -- therefore the split */
-
- __asm__ volatile
- ("
- trap #1;
- addw #16,sp "
- : "=r"(retvalue) /* outputs */
- : /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_13_wl(short n, long a)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
-
- __asm__ volatile
- ("
- movl %2,sp@-;
- movw %1,sp@-;
- trap #13;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_13_w(short n)
- {
- register long retvalue __asm__("d0");
-
- __asm__ volatile
- ("
- movw %1,sp@-;
- trap #13;
- addqw #2,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_13_ww(short n, short a)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
-
- __asm__ volatile
- ("
- movw %2,sp@-;
- movw %1,sp@-;
- trap #13;
- addqw #4,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_13_www(short n, short a, short b)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- short _b = (b);
-
- __asm__ volatile
- ("
- movw %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #13;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_13_wwlwww(short n, short a, long b, short c, short d, short e)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- long _b = (b);
- short _c = (c);
- short _d = (d);
- short _e = (e);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movw %3,sp@-;
- movw %2,sp@-;
- movl %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(_a), "r"(_b), "r"(_c), "r"(_d), "r"(_e) /* inputs */
- );
-
- __asm__ volatile
- ("
- movw %1,sp@-;
- trap #13;
- addw #14,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_13_wwl(short n, short a, long b)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- long _b = (b);
-
- __asm__ volatile
- ("
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #13;
- addqw #8,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wwl(short n, short a, long b)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- long _b = (b);
-
- __asm__ volatile
- ("
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addqw #8,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wwll(short n, short a, long b, long c)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- long _b = (b);
- long _c = (c);
-
- __asm__ volatile
- ("
- movl %4,sp@-;
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addw #12,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_ww(short n, short a)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
-
- __asm__ volatile
- ("
- movw %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addqw #4,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_w(short n)
- {
- register long retvalue __asm__("d0");
-
- __asm__ volatile
- ("
- movw %1,sp@-;
- trap #14;
- addqw #2,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wllw(short n, long a, long b, short c)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
- short _c = (c);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movl %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addw #12,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wl(short n, long a)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
-
- __asm__ volatile
- ("
- movl %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_www(short n, short a, short b)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- short _b = (b);
-
- __asm__ volatile
- ("
- movw %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wllwwwww(short n, long a, long b, short c, short d, short e,
- short f, short g)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
- short _c = (c);
- short _d = (d);
- short _e = (e);
- short _f = (f);
- short _g = (g);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movw %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(_c), "r"(_d), "r"(_e), "r"(_f), "r"(_g) /* inputs */
- );
-
- __asm__ volatile
- ("
- movl %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addw #20,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wllwwwwlw(short n, long a, long b, short c, short d, short e,
- short f, long g, short h)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
- short _c = (c);
- short _d = (d);
- short _e = (e);
- short _f = (f);
- long _g = (g);
- short _h = (h);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(_d), "r"(_e), "r"(_f), "r"(_g), "r"(_h) /* inputs */
- );
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movl %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addw #24,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wllwwwwwlw(short n, long a, long b, short c, short d, short e,
- short f, short g, long h, short i)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
- short _c = (c);
- short _d = (d);
- short _e = (e);
- short _f = (f);
- short _g = (g);
- long _h = (h);
- short _i = (i);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(_e), "r"(_f), "r"(_g), "r"(_h), "r"(_i) /* inputs */
- );
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movw %3,sp@-;
- movl %2,sp@-;
- movl %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs */
- );
-
- __asm__ volatile
- ("
- trap #14;
- addw #26,sp "
- : "=r"(retvalue) /* outputs */
- : /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
-
- long trap_14_wwwwwww(short n, short a, short b, short c, short d, short e,
- short f)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- short _b = (b);
- short _c = (c);
- short _d = (d);
- short _e = (e);
- short _f = (f);
-
- __asm__ volatile
- ("
- movw %4,sp@-;
- movw %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(_b), "r"(_c), "r"(_d), "r"(_e), "r"(_f) /* inputs */
- );
-
- __asm__ volatile
- ("
- movw %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addw #14,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wlll(short n, long a, long b, long c)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
- long _c = (c);
-
- __asm__ volatile
- ("
- movl %4,sp@-;
- movl %3,sp@-;
- movl %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addw #14,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wllww(short n, long a, long b, short c, short d)
- {
- register long retvalue __asm__("d0");
- long _a = (a);
- long _b = (b);
- short _c = (c);
- short _d = (d);
-
- __asm__ volatile
- ("
- movw %3,sp@-;
- movw %2,sp@-;
- movl %1,sp@-;
- movl %0,sp@- "
- : /* outputs */
- : "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs */
- );
-
- __asm__ volatile
- ("
- movw %1,sp@-;
- trap #14;
- addw #14,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
- long trap_14_wwwwl(short n, short a, short b, short c, long d)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- short _b = (b);
- short _c = (c);
- long _d = (d);
-
- __asm__ volatile
- ("
- movl %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- movw %0,sp@- "
- : /* outputs */
- : "r"(_a), "r"(_b), "r"(_c), "r"(_d) /* inputs */
- );
-
- __asm__ volatile
- ("
- movw %1,sp@-;
- trap #14;
- addw #12,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-
-
- long trap_14_wwwl(short n, short a, short b, long c)
- {
- register long retvalue __asm__("d0");
- short _a = (a);
- short _b = (b);
- long _c = (c);
-
- __asm__ volatile
- ("
- movl %4,sp@-;
- movw %3,sp@-;
- movw %2,sp@-;
- movw %1,sp@-;
- trap #14;
- addqw #6,sp "
- : "=r"(retvalue) /* outputs */
- : "r"(n), "r"(_a), "r"(_b), "r"(_c) /* inputs */
- : "d0", "d1", "d2", "a0", "a1", "a2" /* clobbered regs */
- );
- return retvalue;
- }
-