Crawly Crypt Collection 1/crawlyvol1.bin/program/compiler/fasbin21/fas_src/as8048/as8048.doc

Text File | 1990-12-11 | 6KB | 431 lines

.HM A 1 1 1 1 1 1
.H 1 "Appendix for as8048 Frankenstein Assembler"
.H 2 "Pseudo Operations"
.H 3 "Standard Pseudo Operation Mnemonics"
.VL 40 5 1
.LI "End"
END
.LI "File Inclusion"
INCL
INCLUDE
.LI "If"
IF
.LI "Else"
ELSE
.LI "End If"
ENDI
.LI "Equate"
EQU
.LI "Set"
SET
.LI "Org"
ORG
.LI "Reserve Memory"
RESERVE
RMB
.LI "Define Byte Data"
BYTE
DB
FCB
.LI "Define Word Data"
DW
FDB
WORD
.LI "Define String Data"
FCC
STRING
.LI "Define Character Set Translation"
CHARSET
.LI "Define Character Value"
CHARDEF
CHD
.LI "Use Character Translation"
CHARUSE
.LE
.H 3 "Machine Dependent Pseudo Operations"
.H 4 "Instruction Set Selection"
.DS I N
CPU string
.DE
The instruction set can be specified in the source file with the CPU
pseudooperation.
The string, delimited by quotes or apostrophes, is scanned for a
substring which selects which instruction set is used.
When the program is invoked, this operation is performed on the name of
the program, then the -p optional arguement, if any, and then any CPU
statements.
The last one selects which subset of the instructions the assembler will
accept.
The instruction set can be changed at any place in the source file.
.VL 30 5 1
.LI "Instruction Set"
Substrings
.LI "80C48"
C48
c48
C35
c35
.LI "80C49"
C49
c49
C39
c39
.LI "80C50"
C50
c50
C40
c40
.LI "8048"
48
35
.LI "8049"
49
39
.LI "8050"
50
40
.LI "8041"
41
.LI "8042"
42
.LE
.H 4 "Register Set"
.DS I N
Label REGISTER expr
.DE
.P
The REGISTER statement is a version of the SET statement that checks that the
value of its expression is a valid data register location for the current
CPU selection.
The REGISTER statement sets the symbol specified in the label field with the
numeric value of the expression.
The REGISTER statement can change the value of a symbol, but only if the
symbol is originally defined in a previous SET or REGISTER statement.
.DS I N
Example
.SP
dtabl    register    32

    mov    r1, #dtabl
    mov    a, @r1
.DE
.H 2 "Instructions"
.H 3 "Instruction List"
.TS H
;
l l l.
Opcode    Syntax    Selection Criteria
.sp
.TH
.sp
ADD     A ',' '#' expr
ADD     A ',' '@' REG
ADD     A ',' REG
.sp
ADDC     A ',' '#' expr
ADDC     A ',' '@' REG
ADDC     A ',' REG
.sp
ANL     A ',' '#' expr
ANL     A ',' '@' REG
ANL     A ',' REG
ANL     BUS ',' '#' expr    INSTNOT41
ANL     P1 ',' '#' expr
ANL     P2 ',' '#' expr
.sp
ANLD     P47 ',' A
.sp
CALL     expr
.sp
CLR     A
CLR     C
CLR     F0
CLR     F1
.sp
CPL     A
CPL     C
CPL     F0
CPL     F1
.sp
DA     A
.sp
DEC     A
DEC     REG
.sp
DIS     I
DIS     TCNTI
.sp
DJNZ     REG ',' expr
.sp
EN     DMA    INST41
EN     FLAGS    INST41
EN     I
EN     TCNTI
.sp
ENT0     CLK    INSTNOT41
.sp
HALT        INSTIDL
.sp
IDL        INSTIDL
.sp
IN     A ',' DBB    INST41
IN     A ',' P1
IN     A ',' P2
.sp
INC     '@' REG
INC     A
INC     REG
.sp
INS     A ',' BUS    INSTNOT41
.sp
JB0     expr
.sp
JB1     expr
.sp
JB2     expr
.sp
JB3     expr
.sp
JB4     expr
.sp
JB5     expr
.sp
JB6     expr
.sp
JB7     expr
.sp
JC     expr
.sp
JF0     expr
.sp
JF1     expr
.sp
JMP     expr
.sp
JMPP     '@' A
.sp
JNC     expr
.sp
JNI     expr    INSTNOT41
.sp
JNIBF     expr    INST41
.sp
JNT0     expr
.sp
JNT1     expr
.sp
JNZ     expr
.sp
JOBF     expr    INST41
.sp
JT0     expr
.sp
JT1     expr
.sp
JTF     expr
.sp
JZ     expr
.sp
MOV     '@' REG ',' '#' expr
MOV     '@' REG ',' A
MOV     A ',' '#' expr
MOV     A ',' '@' REG
MOV     A ',' PSW
MOV     A ',' T
MOV     A ',' REG
MOV     PSW ',' A
MOV     STS ',' A
MOV     T ',' A
MOV     REG ',' '#' expr
MOV     REG ',' A
.sp
MOVD     A ',' P47
MOVD     P47 ',' A
.sp
MOVP3     A ',' '@' A
.sp
MOVP     A ',' '@' A
.sp
MOVX     '@' REG ',' A    INSTNOT41
MOVX     A ',' '@' REG    INSTNOT41
.sp
NOP
.sp
ORL     A ',' '#' expr
ORL     A ',' '@' REG
ORL     A ',' REG
ORL     BUS ',' '#' expr    INSTNOT41
ORL     P1 ',' '#' expr
ORL     P2 ',' '#' expr
.sp
ORLD     P47 ',' A
.sp
OUT     DBB ',' A    INST41
.sp
OUTL     BUS ',' A    INSTNOT41
OUTL     P1 ',' A
OUTL     P2 ',' A
.sp
RET
.sp
RETR
.sp
RL     A
.sp
RLC     A
.sp
RR     A
.sp
RRC     A
.sp
SEL     MSELC    INSTNOT41
SEL     RSELC
.sp
STOP     TCNT
.sp
STRT     CNT
STRT     T
.sp
SWAP     A
.sp
XCH     A ',' '@' REG
XCH     A ',' REG
.sp
XCHD     A ',' '@' REG
.sp
XRL     A ',' '#' expr
XRL     A ',' '@' REG
XRL     A ',' REG
.TE
.H 3 "Operands"
.VL 25 5
.LI REG
REG can be any of r0, r1, r2, r3, r4, r5, r6, r7, unless proceeded by a
'@' where only r0, and r1 are accepted.
.LI MSELC
MSELC represents the symbols mb0 and mb1.
.LI RSELC
RSELC represents the symbols rb0 and rb1.
.LI P47
P47 represents the symbols p4, p5, p6, p7.
.LE
.P
There are uppercase versions of all the reserved symbols.
.H 3 "Selection Criteria Keywords"
.VL 25 5
.LI INSTIDL
The instruction is only available on CMOS implementations.
.LI INSTNOT41
The instruction is not available in the 8041.
.LI INST41
The instruction is only available in the 8041.
.LE
.H 3 "Apostrophes"
The apostrophes in the syntax field are a notation used for the
parser generator and are not put in the assembler source statement.
.H 2 "Notes"
.H 3 "Reserved Symbols"
.H 4 "Machine Dependent Reserved Symbols"
A
BUS
C
CLK
CNT
DBB
DMA
F0
F1
FLAGS
I
MB0
MB1
P1
P2
P4
P5
P6
P7
PSW
R0
R1
R2
R3
R4
R5
R6
R7
RB0
RB1
STS
T
TCNT
TCNTI
a
bus
c
clk
cnt
dbb
dma
f0
f1
flags
i
mb0
mb1
p1
p2
p4
p5
p6
p7
psw
r0
r1
r2
r3
r4
r5
r6
r7
rb0
rb1
sts
t
tcnt
tcnti
.H 4 "Standard Reserved Symbols"
AND
DEFINED
EQ
GE
GT
HIGH
LE
LOW
LT
MOD
NE
NOT
OR
SHL
SHR
XOR
and
defined
eq
ge
gt
high
le
low
lt
mod
ne
not
or
shl
shr
xor
.TC 1 1 7