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- A. A✓A✓A✓Ap✓p✓p✓pp✓p✓p✓pe✓e✓e✓en✓n✓n✓nd✓d✓d✓di✓i✓i✓ix✓x✓x✓x f✓f✓f✓fo✓o✓o✓or✓r✓r✓r a✓a✓a✓as✓s✓s✓s8✓8✓8✓80✓0✓0✓05✓5✓5✓51✓1✓1✓1 F✓F✓F✓Fr✓r✓r✓ra✓a✓a✓an✓n✓n✓nk✓k✓k✓ke✓e✓e✓en✓n✓n✓ns✓s✓s✓st✓t✓t✓te✓e✓e✓ei✓i✓i✓in✓n✓n✓n A✓A✓A✓As✓s✓s✓ss✓s✓s✓se✓e✓e✓em✓m✓m✓mb✓b✓b✓bl✓l✓l✓le✓e✓e✓er✓r✓r✓r
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- A.1 P✓P✓P✓Ps✓s✓s✓se✓e✓e✓eu✓u✓u✓ud✓d✓d✓do✓o✓o✓o O✓O✓O✓Op✓p✓p✓pe✓e✓e✓er✓r✓r✓ra✓a✓a✓at✓t✓t✓ti✓i✓i✓io✓o✓o✓on✓n✓n✓ns✓s✓s✓s
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- A.1.1 _✓S_✓t_✓a_✓n_✓d_✓a_✓r_✓d__✓P_✓s_✓e_✓u_✓d_✓o__✓O_✓p_✓e_✓r_✓a_✓t_✓i_✓o_✓n__✓M_✓n_✓e_✓m_✓o_✓n_✓i_✓c_✓s
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- End END
- File Inclusion INCL INCLUDE
- If IF
- Else ELSE
- End If ENDI
- Equate EQU
- Set SET
- Org ORG
- Reserve Memory RESERVE RMB
- Define Byte Data BYTE DB FCB
- Define Word Data DW FDB WORD
- Define String Data FCC STRING
- Define Character Set Translation CHARSET
- Define Character Value CHARDEF CHD
- Use Character Translation CHARUSE
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- A.1.2 _✓M_✓a_✓c_✓h_✓i_✓n_✓e__✓D_✓e_✓p_✓e_✓n_✓d_✓e_✓n_✓t__✓P_✓s_✓e_✓u_✓d_✓o__✓O_✓p_✓e_✓r_✓a_✓t_✓i_✓o_✓n_✓s
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- A.1.2.1 _✓D_✓e_✓f_✓i_✓n_✓e__✓W_✓o_✓r_✓d__✓D_✓a_✓t_✓a The Define Word Data pseudo-
- operations generate the byte reversed form for 16 bit
- constants. The first byte is the low order half, followed
- by the high order byte.
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- A.2 I✓I✓I✓In✓n✓n✓ns✓s✓s✓st✓t✓t✓tr✓r✓r✓ru✓u✓u✓uc✓c✓c✓ct✓t✓t✓ti✓i✓i✓io✓o✓o✓on✓n✓n✓ns✓s✓s✓s
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- A.2.1 _✓I_✓n_✓s_✓t_✓r_✓u_✓c_✓t_✓i_✓o_✓n__✓L_✓i_✓s_✓t
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- Opcode Syntax Selection Criteria
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- ACALL expr
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- ADD A ',' '#' expr
- ADD A ',' '@' REG R01
- ADD A ',' REG R07
- ADD A ',' expr
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- ADDC A ',' '#' expr
- ADDC A ',' '@' REG R01
- ADDC A ',' REG R07
- ADDC A ',' expr
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- AJMP expr
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- ANL A ',' '#' expr
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- Opcode Syntax Selection Criteria
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- ANL A ',' '@' REG R01
- ANL A ',' REG R07
- ANL A ',' expr
- ANL C ',' '/' bit
- ANL C ',' '/' expr
- ANL C ',' bit
- ANL C ',' expr
- ANL expr ',' '#' expr
- ANL expr ','A
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- CJNE A ',' '#' expr ',' expr
- CJNE A ',' expr ',' expr
- CJNE '@' REG ',' '#' expr ',' expr R01
- CJNE REG ',' '#' expr ',' expr R07
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- CLR A
- CLR C
- CLR bit
- CLR expr
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- CPL A
- CPL C
- CPL bit
- CPL expr
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- DA A
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- DEC '@' REG R01
- DEC A
- DEC REG R07
- DEC expr
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- DIV AB
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- DJNZ REG ',' expr R07
- DJNZ expr ',' expr
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- INC '@' REG R01
- INC A
- INC DPTR
- INC REG R07
- INC expr
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- JB bit ',' expr
- JB expr ',' expr
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- JBC bit ',' expr
- JBC expr ',' expr
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- Opcode Syntax Selection Criteria
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- JC expr
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- JMP '@' A '+' DPTR
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- JNB bit ',' expr
- JNB expr ',' expr
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- JNC expr
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- JNZ expr
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- JZ expr
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- LCALL expr
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- LJMP expr
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- MOV '@' REG ',' '#' expr R01
- MOV '@' REG ',' A R01
- MOV '@' REG ',' expr R01
- MOV A ',' '#' expr
- MOV A ',' '@' REG R01
- MOV A ',' REG R07
- MOV A ',' expr
- MOV C ',' bit
- MOV C ',' expr
- MOV DPTR ',' '#' expr
- MOV REG ',' A R07
- MOV REG ',' '#' expr R07
- MOV REG ',' expr R07
- MOV bit ',' C
- MOV expr ',' '#' expr
- MOV expr ',' '@' REG R01
- MOV expr ',' A
- MOV expr ',' C
- MOV expr ',' REG R07
- MOV expr ',' expr
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- MOVC A ',' '@' A '+' DPTR
- MOVC A ',' '@' A '+' PC
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- MOVX '@' DPTR ',' A
- MOVX '@' REG ',' A R01
- MOVX A ',' '@' DPTR
- MOVX A ',' '@' REG R01
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- MUL AB
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- NOP
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- Opcode Syntax Selection Criteria
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- ORL A ',' '#' expr
- ORL A ',' '@' REG R01
- ORL A ',' REG R07
- ORL A ',' expr
- ORL C ',' '/' bit
- ORL C ',' '/' expr
- ORL C ',' bit
- ORL C ',' expr
- ORL expr ',' '#' expr
- ORL expr ',' A
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- POP expr
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- PUSH expr
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- RET
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- RETI
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- RL A
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- RLC A
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- RR A
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- RRC A
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- SETB C
- SETB bit
- SETB expr
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- SJMP expr
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- SUBB A ',' '#' expr
- SUBB A ',' '@' REG R01
- SUBB A ',' REG R07
- SUBB A ',' expr
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- SWAP A
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- XCH A ',' '@' REG R01
- XCH A ',' REG R07
- XCH A ',' expr
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- XCHD A ',' '@' REG R01
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- XRL A ',' '#' expr
- XRL A ',' '@' REG R01
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- - 5 -
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- Opcode Syntax Selection Criteria
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- XRL A ',' REG R07
- XRL A ',' expr
- XRL expr ',' '#' expr
- XRL expr ',' A
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- A.2.2 _✓S_✓e_✓l_✓e_✓c_✓t_✓i_✓o_✓n__✓C_✓r_✓i_✓t_✓e_✓r_✓i_✓a__✓K_✓e_✓y_✓w_✓o_✓r_✓d_✓s
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- R01 Only the reserved symbols R0 and R1
- (or r0, r1) are acceptable as the
- REG operand.
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- R07 All the reserved symbols R0 thru R7
- are acceptable as the REG operand.
-
- A.2.3 _✓B_✓i_✓t__✓O_✓p_✓e_✓r_✓a_✓n_✓d_✓s Bit Addresses can be in two forms.
-
- One form is "expression.constant" where expression gives an
- address for a bit addressable register and constant (in the
- range of 0 to 7) gives the bit number in the byte.
- Expression values must be either in the range of 20h to 2fh,
- or the multiples of 8 between 80h and f8h, and defined in
- the first pass.
-
- The second form is an symbolic expression with value between
- 0 and 255. The value of the expression is placed in the
- operand field of the instruction without modification.
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- A.2.4 _✓A_✓p_✓o_✓s_✓t_✓r_✓o_✓p_✓h_✓e_✓s The apostrophes in the syntax field are
- a notation used for the parser generator and are not put in
- the assembler source statement.
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- A.3 N✓N✓N✓No✓o✓o✓ot✓t✓t✓te✓e✓e✓es✓s✓s✓s
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- A.3.1 _✓A_✓d_✓d_✓r_✓e_✓s_✓s__✓S_✓p_✓a_✓c_✓e_✓s The Four address spaces, Program
- Memory, Internal Data Memory, Bit Numbers, and External Data
- Memory are not differentiated in the symbol table. Which
- address space a symbol refers to is determined by the
- context of the instruction operands it appears in.
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- A.3.2 _✓R_✓e_✓s_✓e_✓r_✓v_✓e_✓d__✓S_✓y_✓m_✓b_✓o_✓l_✓s
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- A.3.2.1 _✓M_✓a_✓c_✓h_✓i_✓n_✓e__✓D_✓e_✓p_✓e_✓n_✓d_✓e_✓n_✓t__✓R_✓e_✓s_✓e_✓r_✓v_✓e_✓d__✓S_✓y_✓m_✓b_✓o_✓l_✓s A AB C DPTR PC
- R0 R1 R2 R3 R4 R5 R6 R7 a ab c dptr pc r0 r1 r2 r3 r4 r5 r6
- r7
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- A.3.2.2 _✓S_✓t_✓a_✓n_✓d_✓a_✓r_✓d__✓R_✓e_✓s_✓e_✓r_✓v_✓e_✓d__✓S_✓y_✓m_✓b_✓o_✓l_✓s AND DEFINED EQ GE GT
- HIGH LE LOW LT MOD NE NOT OR SHL SHR XOR and defined eq ge
- gt high le low lt mod ne not or shl shr xor
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- CONTENTS
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- A. Appendix for as8051 Frankenstein Assembler........... 1
- A.1 Pseudo Operations............................... 1
- A.2 Instructions.................................... 1
- A.3 Notes........................................... 5
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