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C/C++ Source or Header  |  1999-05-13  |  39.1 KB  |  1,442 lines
  1. #ifndef _NTCOMPAT_H_
  2. #define _NTCOMPAT_H_
  3.  
  4. #include <windef.h>
  5. #include <types.h>
  6. #include <winbase.h>
  7.  
  8. #ifdef __cplusplus
  9. extern "C" {
  10. #endif
  11.  
  12. typedef LONG NTSTATUS, *PNTSTATUS;
  13.  
  14. typedef CONST char *PCSZ;
  15.  
  16. typedef char CCHAR, *PCCHAR;
  17. typedef short CSHORT, *PCSHORT;
  18. typedef ULONG CLONG, *PCLONG;
  19.  
  20. typedef struct _STRING {
  21.           USHORT        Length;
  22.           USHORT        MaximumLength;
  23. #ifdef MIDL_PASS
  24.           [size_is(MaximumLength), length_is(Length)]
  25. #endif
  26.           PCHAR         Buffer;
  27.         } STRING, *PSTRING;
  28.  
  29. typedef struct _CSTRING {
  30.           USHORT        Length;
  31.           USHORT        MaximumLength;
  32.           CONST char    *Buffer;
  33.         } CSTRING, *PCSTRING;
  34.  
  35. typedef struct _UNICODE_STRING {
  36.           USHORT        Length;
  37.           USHORT        MaximumLength;
  38. #ifdef MIDL_PASS
  39.           [size_is(MaximumLength / 2), length_is((Length) / 2)] USHORT *Buffer;
  40. #else
  41.           PWSTR         Buffer;
  42. #endif
  43.         } UNICODE_STRING, *PUNICODE_STRING;
  44.  
  45. typedef STRING ANSI_STRING, *PANSI_STRING;
  46. typedef STRING OEM_STRING, *POEM_STRING;
  47. typedef STRING CANSI_STRING;
  48. typedef PSTRING PCANSI_STRING;
  49.  
  50. typedef LARGE_INTEGER PHYSICAL_ADDRESS, *PPHYSICAL_ADDRESS;
  51.  
  52. /* @@@ until we have it for real */
  53. typedef VOID MDL, *PMDL;
  54.  
  55. /* I/O bus interface types */
  56. typedef enum _INTERFACE_TYPE {
  57.           InterfaceTypeUndefined = -1,
  58.           Internal,
  59.           Isa,
  60.           Eisa,
  61.           MicroChannel,
  62.           TurboChannel,
  63.           PCIBus,
  64.           VMEBus,
  65.           NuBus,
  66.           PCMCIABus,
  67.           CBus,
  68.           MPIBus,
  69.           MPSABus,
  70.           ProcessorInternal,
  71.           InternalPowerBus,
  72.           PNPISABus,
  73.           MaximumInterfaceType
  74.         } INTERFACE_TYPE, *PINTERFACE_TYPE;
  75.  
  76. /* bus information types */
  77. typedef enum _BUS_DATA_TYPE {
  78.           ConfigurationSpaceUndefined = -1,
  79.           Cmos,
  80.           EisaConfiguration,
  81.           Pos,
  82.           CbusConfiguration,
  83.           PCIConfiguration,
  84.           VMEConfiguration,
  85.           NuBusConfiguration,
  86.           PCMCIAConfiguration,
  87.           MPIConfiguration,
  88.           MPSAConfiguration,
  89.           PNPISAConfiguration,
  90.           MaximumBusDataType
  91.         } BUS_DATA_TYPE, *PBUS_DATA_TYPE;
  92.  
  93. /* DMA transfer widths */
  94. typedef enum _DMA_WIDTH {
  95.           Width8Bits,
  96.           Width16Bits,
  97.           Width32Bits,
  98.           MaximumDmaWidth
  99.         } DMA_WIDTH, *PDMA_WIDTH;
  100.  
  101. /* DMA transfer speeds */
  102. typedef enum _DMA_SPEED {
  103.           Compatible,
  104.           TypeA,
  105.           TypeB,
  106.           TypeC,
  107.           MaximumDmaSpeed
  108.         } DMA_SPEED, *PDMA_SPEED;
  109.  
  110. /* PCI configuration */
  111. typedef struct _PCI_SLOT_NUMBER {
  112.           union {
  113.             struct {
  114.               ULONG     DeviceNumber:5;
  115.               ULONG     FunctionNumber:3;
  116.               ULONG     Reserved:24;
  117.             } bits;
  118.             ULONG       AsULONG;
  119.           } u;
  120.         } PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER;
  121.  
  122. #define PCI_TYPE0_ADDRESSES                     6
  123. #define PCI_TYPE1_ADDRESSES                     2
  124.  
  125. typedef struct _PCI_COMMON_CONFIG {
  126.           USHORT        VendorID;
  127.           USHORT        DeviceID;
  128.           USHORT        Command;
  129.           USHORT        Status;
  130.           UCHAR         RevisionID;
  131.           UCHAR         ProgIf;
  132.           UCHAR         SubClass;
  133.           UCHAR         BaseClass;
  134.           UCHAR         CacheLineSize;
  135.           UCHAR         LatencyTimer;
  136.           UCHAR         HeaderType;
  137.           UCHAR         BIST;
  138.  
  139.           union {
  140.             struct _PCI_HEADER_TYPE_0 {
  141.               ULONG     BaseAddresses[PCI_TYPE0_ADDRESSES];
  142.               ULONG     CIS;
  143.               USHORT    SubVendorID;
  144.               USHORT    SubSystemID;
  145.               ULONG     ROMBaseAddress;
  146.               ULONG     Reserved2[2];
  147.               UCHAR     InterruptLine;
  148.               UCHAR     InterruptPin;
  149.               UCHAR     MinimumGrant;
  150.               UCHAR     MaximumLatency;
  151.             } type0;
  152.  
  153.             struct _PCI_HEADER_TYPE_1 {
  154.               ULONG     BaseAddresses[PCI_TYPE1_ADDRESSES];
  155.               UCHAR     PrimaryBus;
  156.               UCHAR     SecondaryBus;
  157.               UCHAR     SubordinateBus;
  158.               UCHAR     SecondaryLatency;
  159.               UCHAR     IOBase;
  160.               UCHAR     IOLimit;
  161.               USHORT    SecondaryStatus;
  162.               USHORT    MemoryBase;
  163.               USHORT    MemoryLimit;
  164.               USHORT    PrefetchBase;
  165.               USHORT    PrefetchLimit;
  166.               ULONG     PrefetchBaseUpper32;
  167.               ULONG     PrefetchLimitUpper32;
  168.               USHORT    IOBaseUpper16;
  169.               USHORT    IOLimitUpper16;
  170.               ULONG     Reserved;
  171.               ULONG     ROMBaseAddress;
  172.               UCHAR     InterruptLine;
  173.               UCHAR     InterruptPin;
  174.               USHORT    BridgeControl;
  175.             } type1;
  176.           } u;
  177.  
  178.           UCHAR         DeviceSpecific[192];
  179.        } PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
  180.  
  181. #define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET(PCI_COMMON_CONFIG, DeviceSpecific))
  182.  
  183. #define PCI_MAX_DEVICES                         32
  184. #define PCI_MAX_FUNCTION                        8
  185.  
  186. #define PCI_INVALID_VENDORID                    0xffff
  187.  
  188. /* bit encodings for PCI_COMMON_CONFIG.HeaderType */
  189. #define PCI_MULTIFUNCTION                       0x80
  190. #define PCI_DEVICE_TYPE                         0x00
  191. #define PCI_BRIDGE_TYPE                         0x01
  192.  
  193. /* bit encodings for PCI_COMMON_CONFIG.Command */
  194. #define PCI_ENABLE_IO_SPACE                     0x0001
  195. #define PCI_ENABLE_MEMORY_SPACE                 0x0002
  196. #define PCI_ENABLE_BUS_MASTER                   0x0004
  197. #define PCI_ENABLE_SPECIAL_CYCLES               0x0008
  198. #define PCI_ENABLE_WRITE_AND_INVALIDATE         0x0010
  199. #define PCI_ENABLE_VGA_COMPATIBLE_PALETTE       0x0020
  200. #define PCI_ENABLE_PARITY                       0x0040
  201. #define PCI_ENABLE_WAIT_CYCLE                   0x0080
  202. #define PCI_ENABLE_SERR                         0x0100
  203. #define PCI_ENABLE_FAST_BACK_TO_BACK            0x0200
  204.  
  205. /* bit encodings for PCI_COMMON_CONFIG.Status */
  206. #define PCI_STATUS_FAST_BACK_TO_BACK            0x0080
  207. #define PCI_STATUS_DATA_PARITY_DETECTED         0x0100
  208. #define PCI_STATUS_DEVSEL                       0x0600
  209. #define PCI_STATUS_SIGNALED_TARGET_ABORT        0x0800
  210. #define PCI_STATUS_RECEIVED_TARGET_ABORT        0x1000
  211. #define PCI_STATUS_RECEIVED_MASTER_ABORT        0x2000
  212. #define PCI_STATUS_SIGNALED_SYSTEM_ERROR        0x4000
  213. #define PCI_STATUS_DETECTED_PARITY_ERROR        0x8000
  214.  
  215. /* bit encodings for PCI_COMMON_CONFIG.u.type0.BaseAddresses */
  216. #define PCI_ADDRESS_IO_SPACE                    0x00000001
  217. #define PCI_ADDRESS_MEMORY_TYPE_MASK            0x00000006
  218. #define PCI_ADDRESS_MEMORY_PREFETCHABLE         0x00000008
  219. #define PCI_TYPE_32BIT                          0
  220. #define PCI_TYPE_20BIT                          2
  221. #define PCI_TYPE_64BIT                          4
  222.  
  223. /* bit encodings for PCI_COMMON_CONFIG.u.type0.ROMBaseAddresses */
  224. #define PCI_ROMADDRESS_ENABLED                  0x00000001
  225.  
  226. /* resources */
  227. /* bit masks for Flags when type is CmResourceTypeInterrupt */
  228. #define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE   0
  229. #define CM_RESOURCE_INTERRUPT_LATCHED           1
  230.  
  231. /* bit masks for Flags when type is CmResourceTypeMemory */
  232. #define CM_RESOURCE_MEMORY_READ_WRITE           0x0000
  233. #define CM_RESOURCE_MEMORY_READ_ONLY            0x0001
  234. #define CM_RESOURCE_MEMORY_WRITE_ONLY           0x0002
  235. #define CM_RESOURCE_MEMORY_PREFETCHABLE         0x0004
  236. #define CM_RESOURCE_MEMORY_COMBINEDWRITE        0x0008
  237. #define CM_RESOURCE_MEMORY_24                   0x0010
  238.  
  239. /* bit masks for Flags when type is CmResourceTypePort */
  240. #define CM_RESOURCE_PORT_MEMORY                 0
  241. #define CM_RESOURCE_PORT_IO                     1
  242.  
  243. /* bit masks for Flags when type is CmResourceTypeDma */
  244. #define CM_RESOURCE_DMA_8                       0x0000
  245. #define CM_RESOURCE_DMA_16                      0x0001
  246. #define CM_RESOURCE_DMA_32                      0x0002
  247.  
  248. /* resource options */
  249. #define IO_RESOURCE_PREFERRED                   0x01
  250. #define IO_RESOURCE_DEFAULT                     0x02
  251. #define IO_RESOURCE_ALTERNATIVE                 0x08
  252.  
  253. typedef enum _CM_RESOURCE_TYPE {
  254.           CmResourceTypeNull = 0,
  255.           CmResourceTypePort,
  256.           CmResourceTypeInterrupt,
  257.           CmResourceTypeMemory,
  258.           CmResourceTypeDma,
  259.           CmResourceTypeDeviceSpecific,
  260.           CmResourceTypeMaximum
  261.         } CM_RESOURCE_TYPE;
  262.  
  263. typedef enum _CM_SHARE_DISPOSITION {
  264.           CmResourceShareUndetermined = 0,
  265.           CmResourceShareDeviceExclusive,
  266.           CmResourceShareDriverExclusive,
  267.           CmResourceShareShared
  268.         } CM_SHARE_DISPOSITION;
  269.  
  270. typedef struct _CM_PARTIAL_RESOURCE_DESCRIPTOR {
  271.           UCHAR Type;
  272.           UCHAR ShareDisposition;
  273.           USHORT Flags;
  274.           union {
  275.             struct {
  276.               PHYSICAL_ADDRESS  Start;
  277.               ULONG             Length;
  278.             } Port;
  279.  
  280.             struct {
  281.               ULONG             Level;
  282.               ULONG             Vector;
  283.               ULONG             Affinity;
  284.             } Interrupt;
  285.  
  286.             struct {
  287.               PHYSICAL_ADDRESS  Start;
  288.               ULONG             Length;
  289.             } Memory;
  290.  
  291.             struct {
  292.               ULONG             Channel;
  293.               ULONG             Port;
  294.               ULONG             Reserved1;
  295.             } Dma;
  296.  
  297.             struct {
  298.               ULONG             DataSize;
  299.               ULONG             Reserved1;
  300.               ULONG             Reserved2;
  301.             } DeviceSpecificData;
  302.           } u;
  303.         } CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR;
  304.  
  305. typedef struct _CM_PARTIAL_RESOURCE_LIST {
  306.           USHORT                Version;
  307.           USHORT                Revision;
  308.           ULONG                 Count;
  309.           CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1];
  310.         } CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
  311.  
  312. typedef struct _CM_FULL_RESOURCE_DESCRIPTOR {
  313.           INTERFACE_TYPE        InterfaceType;
  314.           ULONG                 BusNumber;
  315.           CM_PARTIAL_RESOURCE_LIST PartialResourceList;
  316.         } CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
  317.  
  318. typedef struct _CM_RESOURCE_LIST {
  319.           ULONG                 Count;
  320.           CM_FULL_RESOURCE_DESCRIPTOR List[1];
  321.         } CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
  322.  
  323. typedef struct _IO_RESOURCE_DESCRIPTOR {
  324.           UCHAR                 Option;
  325.           UCHAR                 Type;
  326.           UCHAR                 ShareDisposition;
  327.           UCHAR                 Spare1;
  328.           USHORT                Flags;
  329.           USHORT                Spare2;
  330.  
  331.           union {
  332.             struct {
  333.               ULONG             Length;
  334.               ULONG             Alignment;
  335.               PHYSICAL_ADDRESS  MinimumAddress;
  336.               PHYSICAL_ADDRESS  MaximumAddress;
  337.             } Port;
  338.  
  339.             struct {
  340.               ULONG             Length;
  341.               ULONG             Alignment;
  342.               PHYSICAL_ADDRESS  MinimumAddress;
  343.               PHYSICAL_ADDRESS  MaximumAddress;
  344.             } Memory;
  345.  
  346.             struct {
  347.               ULONG             MinimumVector;
  348.               ULONG             MaximumVector;
  349.             } Interrupt;
  350.  
  351.             struct {
  352.               ULONG             MinimumChannel;
  353.               ULONG             MaximumChannel;
  354.             } Dma;
  355.  
  356.         } u;
  357.       } IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
  358.  
  359. typedef struct _IO_RESOURCE_LIST {
  360.           USHORT                Version;
  361.           USHORT                Revision;
  362.           ULONG                 Count;
  363.           IO_RESOURCE_DESCRIPTOR Descriptors[1];
  364.         } IO_RESOURCE_LIST, *PIO_RESOURCE_LIST;
  365.  
  366. typedef struct _IO_RESOURCE_REQUIREMENTS_LIST {
  367.           ULONG                 ListSize;
  368.           INTERFACE_TYPE        InterfaceType;
  369.           ULONG                 BusNumber;
  370.           ULONG                 SlotNumber;
  371.           ULONG                 Reserved[3];
  372.           ULONG                 AlternativeLists;
  373.           IO_RESOURCE_LIST      List[1];
  374.         } IO_RESOURCE_REQUIREMENTS_LIST, *PIO_RESOURCE_REQUIREMENTS_LIST;
  375.  
  376. typedef struct _DRIVER_OBJECT {
  377.           HANDLE                ObjectHandle;
  378.           UNICODE_STRING        DriverName;
  379.           UNICODE_STRING        RegistryPath;
  380.           UNICODE_STRING        ImagePath;
  381.         } DRIVER_OBJECT, *PDRIVER_OBJECT;
  382.  
  383. typedef struct _DEVICE_OBJECT {
  384.           CSHORT                Type;
  385.           USHORT                Size;
  386.           LONG                  ReferenceCount;
  387.           PDRIVER_OBJECT        DriverObject;
  388.           struct _DEVICE_OBJECT *NextDevice;
  389.           struct _DEVICE_OBJECT *AttachedDevice;
  390.         } DEVICE_OBJECT, *PDEVICE_OBJECT;
  391.  
  392. typedef
  393.   VOID
  394.   (*PWORKER_THREAD_ROUTINE)(
  395.     IN PVOID Parameter
  396.   );
  397.  
  398. typedef struct _WORK_QUEUE_ITEM {
  399.           LIST_ENTRY    List;
  400.           PWORKER_THREAD_ROUTINE WorkerRoutine;
  401.           PVOID         Parameter;
  402.         } WORK_QUEUE_ITEM, *PWORK_QUEUE_ITEM;
  403.  
  404. #define UNICODE_NULL ((WCHAR)0)
  405.  
  406. #define STATUS_BUFFER_OVERFLOW          ((NTSTATUS)0x80000005L)
  407. #define STATUS_BUFFER_TOO_SMALL         ((NTSTATUS)0xC0000023L)
  408. #define STATUS_INSUFFICIENT_RESOURCES   ((NTSTATUS)0xC000009AL)
  409. #define STATUS_NOT_SUPPORTED            ((NTSTATUS)0xC00000BBL)
  410. #define STATUS_REQUEST_NOT_ACCEPTED     ((NTSTATUS)0xC00000D0L)
  411.  
  412. #define RtlEqualMemory(_Destination, _Source, _Length) \
  413.           (!memcmp(_Destination, _Source, _Length)
  414. #define RtlMoveMemory(_Destination, _Source, _Length) \
  415.           memmove(_Destination, _Source, _Length)
  416. #define RtlCopyMemory(_Destination, _Source, _Length) \
  417.           memcpy(_Destination, _Source, _Length)
  418. #define RtlFillMemory(_Destination, _Length, _Fill) \
  419.           memset(_Destination, _Fill, _Length)
  420. #define RtlZeroMemory(_Destination, _Length) memset(_Destination, 0, _Length)
  421.  
  422. #if BINARY_COMPATIBLE && !defined(PopEntryList)
  423. /* singly-linked list manipulation routines */
  424. /*++
  425. PSINGLE_LIST_ENTRY
  426. PopEntryList(
  427.   PSINGLE_LIST_ENTRY ListHead
  428. )
  429. --*/
  430. #define PopEntryList(_ListHead) \
  431.           (_ListHead)->Next; \
  432.           { \
  433.             PSINGLE_LIST_ENTRY _FirstEntry = (_ListHead)->Next; \
  434.             if (_FirstEntry != NULL) \
  435.               (_ListHead)->Next = _FirstEntry->Next; \
  436.           }
  437.  
  438. /*++
  439. VOID
  440. PushEntryList(
  441.   PSINGLE_LIST_ENTRY ListHead,
  442.   PSINGLE_LIST_ENTRY Entry
  443. )
  444. --*/
  445. #define PushEntryList(_ListHead, _Entry) \
  446.         { \
  447.           (_Entry)->Next = (_ListHead)->Next; \
  448.           (_ListHead)->Next = _Entry; \
  449.         }
  450. #endif
  451.  
  452. #if BINARY_COMPATIBLE && !defined(InitializeListHead)
  453. /* doubly-linked list manipulation routines */
  454. /*++
  455. VOID
  456. InitializeListHead(
  457.   PLIST_ENTRY ListHead
  458. )
  459. --*/
  460. #define InitializeListHead(_ListHead) \
  461.           ((_ListHead)->Flink = (_ListHead)->Blink = _ListHead)
  462.  
  463. /*++
  464. BOOLEAN
  465. IsListEmpty(
  466.   PLIST_ENTRY ListHead
  467. )
  468. --*/
  469. #define IsListEmpty(_ListHead)   ((_ListHead)->Flink == _ListHead)
  470.  
  471. /*++
  472. PLIST_ENTRY
  473. RemoveHeadList(
  474.   PLIST_ENTRY ListHead
  475. )
  476. --*/
  477. #define RemoveHeadList(_ListHead) \
  478.           (_ListHead)->Flink; \
  479.           RemoveEntryList((_ListHead)->Flink)
  480.  
  481. /*++
  482. PLIST_ENTRY
  483. RemoveTailList(
  484.   PLIST_ENTRY ListHead
  485. )
  486. --*/
  487. #define RemoveTailList(_ListHead) \
  488.           (_ListHead)->Blink; \
  489.           RemoveEntryList((_ListHead)->Blink)
  490.  
  491. /*++
  492. VOID
  493. RemoveEntryList(
  494.   PLIST_ENTRY Entry
  495. )
  496. --*/
  497. #define RemoveEntryList(_Entry) \
  498.         { \
  499.           PLIST_ENTRY _EX_Flink = (_Entry)->Flink; \
  500.           PLIST_ENTRY _EX_Blink = (_Entry)->Blink; \
  501.           _EX_Blink->Flink = _EX_Flink; \
  502.           _EX_Flink->Blink = _EX_Blink; \
  503.         }
  504.  
  505. /*++
  506. VOID
  507. InsertTailList(
  508.   PLIST_ENTRY ListHead,
  509.   PLIST_ENTRY Entry
  510. )
  511. --*/
  512. #define InsertTailList(_ListHead, _Entry) \
  513.         { \
  514.           PLIST_ENTRY _EX_ListHead = _ListHead; \
  515.           PLIST_ENTRY _EX_Blink = _EX_ListHead->Blink; \
  516.           (_Entry)->Flink = _EX_ListHead; \
  517.           (_Entry)->Blink = _EX_Blink; \
  518.           _EX_Blink->Flink = _Entry; \
  519.           _EX_ListHead->Blink = _Entry; \
  520.         }
  521.  
  522. /*++
  523. VOID
  524. InsertHeadList(
  525.   PLIST_ENTRY ListHead,
  526.   PLIST_ENTRY Entry
  527. )
  528. --*/
  529. #define InsertHeadList(_ListHead, _Entry) \
  530.         { \
  531.           PLIST_ENTRY _EX_ListHead = _ListHead; \
  532.           PLIST_ENTRY _EX_Flink = _EX_ListHead->Flink; \
  533.           (_Entry)->Flink = _EX_Flink; \
  534.           (_Entry)->Blink = _EX_ListHead; \
  535.           _EX_Flink->Blink = _Entry; \
  536.           _EX_ListHead->Flink = _Entry; \
  537.         }
  538. #endif
  539.  
  540. /* hal.c */
  541. BOOLEAN
  542. HalTranslateBusAddress(
  543.   IN INTERFACE_TYPE InterfaceType,
  544.   IN ULONG BusNumber,
  545.   IN PHYSICAL_ADDRESS BusAddress,
  546.   IN OUT PULONG AddressSpace,
  547.   OUT PPHYSICAL_ADDRESS TranslatedAddress
  548. );
  549.  
  550. ULONG
  551. HalGetBusDataByOffset(
  552.   IN BUS_DATA_TYPE BusDataType,
  553.   IN ULONG BusNumber,
  554.   IN ULONG SlotNumber,
  555.   IN PVOID Buffer,
  556.   IN ULONG Offset,
  557.   IN ULONG Length
  558. );
  559.  
  560. ULONG
  561. HalSetBusDataByOffset(
  562.   IN BUS_DATA_TYPE BusDataType,
  563.   IN ULONG BusNumber,
  564.   IN ULONG SlotNumber,
  565.   IN PVOID Buffer,
  566.   IN ULONG Offset,
  567.   IN ULONG Length
  568. );
  569.  
  570. NTSTATUS
  571. HalAssignSlotResources(
  572.   IN PUNICODE_STRING RegistryPath,
  573.   IN PUNICODE_STRING DriverClassName OPTIONAL,
  574.   IN PDRIVER_OBJECT DriverObject,
  575.   IN PDEVICE_OBJECT DeviceObject OPTIONAL,
  576.   IN INTERFACE_TYPE BusType,
  577.   IN ULONG BusNumber,
  578.   IN ULONG SlotNumber,
  579.   IN OUT PCM_RESOURCE_LIST *AllocatedResources
  580. );
  581.  
  582. /* mm.c */
  583. PVOID
  584. MmMapIoSpace(
  585.   IN PHYSICAL_ADDRESS PhysicalAddress,
  586.   IN ULONG NumberOfBytes,
  587.   IN BOOLEAN CacheEnable
  588. );
  589.  
  590. VOID
  591. MmUnmapIoSpace(
  592.   IN PVOID BaseAddress,
  593.   IN ULONG NumberOfBytes
  594. );
  595.  
  596. /* io.c */
  597. NTSTATUS
  598. IoAssignResources(
  599.   IN PUNICODE_STRING RegistryPath,
  600.   IN PUNICODE_STRING DriverClassName OPTIONAL,
  601.   IN PDRIVER_OBJECT DriverObject,
  602.   IN PDEVICE_OBJECT DeviceObject OPTIONAL,
  603.   IN PIO_RESOURCE_REQUIREMENTS_LIST RequestedResources,
  604.   IN OUT PCM_RESOURCE_LIST *AllocatedResources
  605. );
  606.  
  607. /* ke.c */
  608. VOID
  609. KeStallExecutionProcessor(
  610.   ULONG MicroSecondsToStall
  611. );
  612.  
  613. VOID
  614. KeFlushWriteBuffer(
  615.   VOID
  616. );
  617.  
  618. /* debug.c */
  619. VOID DbgBreakPoint(VOID);
  620.  
  621. /* this is a standard NT DDK function
  622.    and should not be defined anywhere else */
  623. #if defined(BINARY_COMPATIBLE) && defined(DbgPrint)
  624. #undef DbgPrint
  625. #endif
  626.  
  627. #if !defined(DbgPrint)
  628. ULONG
  629. DbgPrint(
  630.   IN PCHAR DebugMessage,
  631.   ...
  632. );
  633. #endif
  634.  
  635. /* rtl.c */
  636. VOID
  637. RtlInitString(
  638.   OUT PSTRING DestinationString,
  639.   IN PCSZ SourceString OPTIONAL
  640. );
  641.  
  642. VOID
  643. RtlInitAnsiString(
  644.   OUT PANSI_STRING DestinationString,
  645.   IN PCSZ SourceString OPTIONAL
  646. );
  647.  
  648. VOID
  649. RtlInitUnicodeString(
  650.   OUT PUNICODE_STRING DestinationString,
  651.   IN PCWSTR SourceString OPTIONAL
  652. );
  653.  
  654. VOID
  655. RtlFreeUnicodeString(
  656.   IN PUNICODE_STRING UnicodeString
  657. );
  658.  
  659. NTSTATUS
  660. RtlAnsiStringToUnicodeString(
  661.   OUT PUNICODE_STRING DestinationString,
  662.   IN PANSI_STRING SourceString,
  663.   IN BOOLEAN AllocateDestinationString
  664. );
  665.  
  666. NTSTATUS
  667. RtlUnicodeStringToAnsiString(
  668.   IN OUT PANSI_STRING DestinationString,
  669.   IN PUNICODE_STRING SourceString,
  670.   IN BOOLEAN AllocateDestinationString
  671. );
  672.  
  673. NTSTATUS
  674. RtlUpcaseUnicodeString(
  675.   OUT PUNICODE_STRING DestinationString,
  676.   IN PUNICODE_STRING SourceString,
  677.   IN BOOLEAN AllocateDestinationString
  678. );
  679.  
  680. BOOLEAN
  681. RtlEqualUnicodeString(
  682.   IN PUNICODE_STRING String1,
  683.   IN PUNICODE_STRING String2,
  684.   IN BOOLEAN CaseInSensitive
  685. );
  686.  
  687. VOID
  688. RtlCopyUnicodeString(
  689.   OUT PUNICODE_STRING DestinationString,
  690.   IN PUNICODE_STRING SourceString OPTIONAL
  691. );
  692.  
  693. NTSTATUS
  694. RtlAppendUnicodeToString(
  695.   IN PUNICODE_STRING Destination,
  696.   IN PWSTR Source OPTIONAL
  697. );
  698.  
  699. NTSTATUS
  700. RtlAppendUnicodeStringToString(
  701.   IN PUNICODE_STRING Destination,
  702.   IN PUNICODE_STRING Source
  703. );
  704.  
  705. #if defined(x86)
  706. #define PAGE_SIZE       0x1000
  707.  
  708. #define HalGetDmaAlignmentRequirement() ((ULONG)1)
  709. #define KeFlushIoBuffers(_Mdl, _ReadOperation, _DmaOperation)
  710.  
  711. /* rawio.c */
  712. UCHAR
  713. READ_PORT_UCHAR(
  714.   IN PUCHAR Port
  715. );
  716.  
  717. USHORT
  718. READ_PORT_USHORT(
  719.   IN PUSHORT Port
  720. );
  721.  
  722. ULONG
  723. READ_PORT_ULONG(
  724.   IN PULONG Port
  725. );
  726.  
  727. VOID
  728. READ_PORT_BUFFER_UCHAR(
  729.   IN PUCHAR Port,
  730.   IN PUCHAR Buffer,
  731.   IN ULONG Count
  732. );
  733.  
  734. VOID
  735. READ_PORT_BUFFER_USHORT(
  736.   IN PUSHORT Port,
  737.   IN PUSHORT Buffer,
  738.   IN ULONG Count
  739. );
  740.  
  741. VOID
  742. READ_PORT_BUFFER_ULONG(
  743.   IN PULONG Port,
  744.   IN PULONG Buffer,
  745.   IN ULONG Count
  746. );
  747.  
  748. VOID
  749. WRITE_PORT_UCHAR(
  750.   IN PUCHAR Port,
  751.   IN UCHAR Value
  752. );
  753.  
  754. VOID
  755. WRITE_PORT_USHORT(
  756.   IN PUSHORT Port,
  757.   IN USHORT Value
  758. );
  759.  
  760. VOID
  761. WRITE_PORT_ULONG(
  762.   IN PULONG Port,
  763.   IN ULONG Value
  764. );
  765.  
  766. VOID
  767. WRITE_PORT_BUFFER_UCHAR(
  768.   IN PUCHAR Port,
  769.   IN PUCHAR Buffer,
  770.   IN ULONG Count
  771. );
  772.  
  773. VOID
  774. WRITE_PORT_BUFFER_USHORT(
  775.   IN PUSHORT Port,
  776.   IN PUSHORT Buffer,
  777.   IN ULONG Count
  778. );
  779.  
  780. VOID
  781. WRITE_PORT_BUFFER_ULONG(
  782.   IN PULONG Port,
  783.   IN PULONG Buffer,
  784.   IN ULONG Count
  785. );
  786.  
  787. UCHAR
  788. READ_REGISTER_UCHAR(
  789.   IN PUCHAR Register
  790. );
  791.  
  792. USHORT
  793. READ_REGISTER_USHORT(
  794.   IN PUSHORT Register
  795. );
  796.  
  797. ULONG
  798. READ_REGISTER_ULONG(
  799.   IN PULONG Register
  800. );
  801.  
  802. VOID
  803. READ_REGISTER_BUFFER_UCHAR(
  804.  IN PUCHAR Register,
  805.  IN PUCHAR Buffer,
  806.  IN ULONG Count
  807. );
  808.  
  809. VOID
  810. READ_REGISTER_BUFFER_USHORT(
  811.  IN PUSHORT Register,
  812.  IN PUSHORT Buffer,
  813.  IN ULONG Count
  814. );
  815.  
  816. VOID
  817. READ_REGISTER_BUFFER_ULONG(
  818.  IN PULONG Register,
  819.  IN PULONG Buffer,
  820.  IN ULONG Count
  821. );
  822.  
  823. VOID
  824. WRITE_REGISTER_UCHAR(
  825.   IN PUCHAR Register,
  826.   IN UCHAR Value
  827. );
  828.  
  829. VOID
  830. WRITE_REGISTER_USHORT(
  831.   IN PUSHORT Register,
  832.   IN USHORT Value
  833. );
  834.  
  835. VOID
  836. WRITE_REGISTER_ULONG(
  837.   IN PULONG Register,
  838.   IN ULONG Value
  839. );
  840.  
  841. VOID
  842. WRITE_REGISTER_BUFFER_UCHAR(
  843.   IN PUCHAR Register,
  844.   IN PUCHAR Buffer,
  845.   IN ULONG Count
  846. );
  847.  
  848. VOID
  849. WRITE_REGISTER_BUFFER_USHORT(
  850.   IN PUSHORT Register,
  851.   IN PUSHORT Buffer,
  852.   IN ULONG Count
  853. );
  854.  
  855. VOID
  856. WRITE_REGISTER_BUFFER_ULONG(
  857.   IN PULONG Register,
  858.   IN PULONG Buffer,
  859.   IN ULONG Count
  860. );
  861. #endif /* x86 */
  862.  
  863. #if defined(MIPS)
  864. #define PAGE_SIZE               0x1000
  865. #define PHYS_ADDR_PCI_MEM_BASE  0x08000000
  866. #define PHYS_ADDR_PCI_CFG_BASE  0x11000000
  867. #define PHYS_ADDR_IO_SPACE_BASE 0x14000000
  868.  
  869. #define READ_PORT_UCHAR(_P) *(volatile UCHAR * const)(_P)
  870.  
  871. #define READ_PORT_USHORT(_P) *(volatile USHORT * const)(_P)
  872.  
  873. #define READ_PORT_ULONG(_P) *(volatile ULONG * const)(_P)
  874.  
  875. #define READ_PORT_BUFFER_UCHAR(_P, _B, _C) \
  876.         { \
  877.           PUCHAR _ReadBuffer = _B; \
  878.           ULONG _ReadCount = _C; \
  879.           ULONG _Index; \
  880.           for (_Index=0; _Index<_ReadCount; _Index++) \
  881.             *(_ReadBuffer++) = *(volatile UCHAR * const)(_P); \
  882.         }
  883.  
  884. #define READ_PORT_BUFFER_USHORT(_P, _B, _C) \
  885.         { \
  886.           PUSHORT _ReadBuffer = _B; \
  887.           ULONG _ReadCount = _C; \
  888.           ULONG _Index; \
  889.           for (_Index=0; _Index<_ReadCount; _Index++) \
  890.             *(_ReadBuffer++) = *(volatile USHORT * const)(_P); \
  891.         }
  892.  
  893. #define READ_PORT_BUFFER_ULONG(_P, _B, _C) \
  894.         { \
  895.           PULONG _ReadBuffer = _B; \
  896.           ULONG _ReadCount = _C; \
  897.           ULONG _Index; \
  898.           for (_Index=0; _Index<_ReadCount; _Index++) \
  899.             *(_ReadBuffer++) = *(volatile ULONG * const)(_P); \
  900.         }
  901.  
  902. #define WRITE_PORT_UCHAR(_P, _V) \
  903.         { \
  904.           *(volatile UCHAR * const)(_P) = _V; \
  905.           KeFlushWriteBuffer(); \
  906.         }
  907.  
  908. #define WRITE_PORT_USHORT(_P, _V) \
  909.         { \
  910.           *(volatile USHORT * const)(_P) = _V; \
  911.           KeFlushWriteBuffer(); \
  912.         }
  913.  
  914. #define WRITE_PORT_ULONG(_P, _V) \
  915.         { \
  916.           *(volatile ULONG * const)(_P) = _V; \
  917.           KeFlushWriteBuffer(); \
  918.         }
  919.  
  920. #define WRITE_PORT_BUFFER_UCHAR(_P, _B, _C) \
  921.         { \
  922.           PUCHAR _WriteBuffer = _B; \
  923.           ULONG _WriteCount = _C; \
  924.           ULONG _Index; \
  925.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  926.             *(volatile UCHAR * const)(_P) = *(_WriteBuffer++); \
  927.             KeFlushWriteBuffer();  \
  928.           } \
  929.         }
  930.  
  931. #define WRITE_PORT_BUFFER_USHORT(_P, _B, _C) \
  932.         { \
  933.           PUSHORT _WriteBuffer = _B; \
  934.           ULONG _WriteCount = _C; \
  935.           ULONG _Index; \
  936.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  937.             *(volatile USHORT * const)(_P) = *(_WriteBuffer++); \
  938.             KeFlushWriteBuffer();  \
  939.           } \
  940.         }
  941.  
  942. #define WRITE_PORT_BUFFER_ULONG(_P, _B, _C) \
  943.         { \
  944.           PULONG _WriteBuffer = _B; \
  945.           ULONG _WriteCount = _C; \
  946.           ULONG _Index; \
  947.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  948.             *(volatile ULONG * const)(_P) = *(_WriteBuffer++); \
  949.             KeFlushWriteBuffer();  \
  950.           } \
  951.         }
  952.  
  953. #define READ_REGISTER_UCHAR(_R) *(volatile UCHAR * const)(_R)
  954.  
  955. #define READ_REGISTER_USHORT(_R) *(volatile USHORT * const)(_R)
  956.  
  957. #define READ_REGISTER_ULONG(_R) *(volatile ULONG * const)(_R)
  958.  
  959. #define READ_REGISTER_BUFFER_UCHAR(_R, _B, _C) \
  960.         { \
  961.           PUCHAR _RegisterBuffer = _R; \
  962.           PUCHAR _ReadBuffer = _B; \
  963.           ULONG _ReadCount = _C; \
  964.           ULONG _Index; \
  965.           for (_Index=0; _Index<_ReadCount; _Index++) \
  966.             *(_ReadBuffer++) = *(volatile UCHAR * const)(_RegisterBuffer++); \
  967.         }
  968.  
  969. #define READ_REGISTER_BUFFER_USHORT(_R, _B, _C) \
  970.         { \
  971.           PUSHORT _RegisterBuffer = _R; \
  972.           PUSHORT _ReadBuffer = _B; \
  973.           ULONG _ReadCount = _C; \
  974.           ULONG _Index; \
  975.           for (_Index=0; _Index<_ReadCount; _Index++) \
  976.             *(_ReadBuffer++) = *(volatile USHORT * const)(_RegisterBuffer++); \
  977.         }
  978.  
  979. #define READ_REGISTER_BUFFER_ULONG(_R, _B, _C) \
  980.         { \
  981.           PULONG _RegisterBuffer = _R; \
  982.           PULONG _ReadBuffer = _B; \
  983.           ULONG _ReadCount = _C; \
  984.           ULONG _Index; \
  985.           for (_Index=0; _Index<_ReadCount; _Index++) \
  986.             *(_ReadBuffer++) = *(volatile ULONG * const)(_RegisterBuffer++); \
  987.         }
  988.  
  989. #define WRITE_REGISTER_UCHAR(_R, _V) \
  990.         { \
  991.           *(volatile UCHAR * const)(_R) = _V; \
  992.           KeFlushWriteBuffer(); \
  993.         }
  994.  
  995. #define WRITE_REGISTER_USHORT(_R, _V) \
  996.         { \
  997.           *(volatile USHORT * const)(_R) = _V; \
  998.           KeFlushWriteBuffer(); \
  999.         }
  1000.  
  1001. #define WRITE_REGISTER_ULONG(_R, _V) \
  1002.         { \
  1003.           *(volatile ULONG * const)(_R) = _V; \
  1004.           KeFlushWriteBuffer(); \
  1005.         }
  1006.  
  1007. #define WRITE_REGISTER_BUFFER_UCHAR(_R, _B, _C) \
  1008.         { \
  1009.           PUCHAR _RegisterBuffer = _R; \
  1010.           PUCHAR _WriteBuffer = _B; \
  1011.           ULONG _WriteCount = _C; \
  1012.           ULONG _Index; \
  1013.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1014.             *(volatile UCHAR * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1015.           KeFlushWriteBuffer(); \
  1016.         }
  1017.  
  1018. #define WRITE_REGISTER_BUFFER_USHORT(_R, _B, _C) \
  1019.         { \
  1020.           PUSHORT _RegisterBuffer = _R; \
  1021.           PUSHORT _WriteBuffer = _B; \
  1022.           ULONG _WriteCount = _C; \
  1023.           ULONG _Index; \
  1024.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1025.             *(volatile USHORT * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1026.           KeFlushWriteBuffer(); \
  1027.         }
  1028.  
  1029. #define WRITE_REGISTER_BUFFER_ULONG(_R, _B, _C) \
  1030.         { \
  1031.           PULONG _RegisterBuffer = _R; \
  1032.           PULONG _WriteBuffer = _B; \
  1033.           ULONG _WriteCount = _C; \
  1034.           ULONG _Index; \
  1035.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1036.             *(volatile ULONG * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1037.           KeFlushWriteBuffer(); \
  1038.         }
  1039.  
  1040. ULONG
  1041. HalGetDmaAlignmentRequirement(
  1042.   VOID
  1043. );
  1044.  
  1045. VOID
  1046. KeFlushIoBuffers (
  1047.   IN PMDL Mdl,
  1048.   IN BOOLEAN ReadOperation,
  1049.   IN BOOLEAN DmaOperation
  1050. );
  1051. #endif /* MIPS */
  1052.  
  1053.  
  1054. #if defined(PPC) || defined(ARM)
  1055.  
  1056. #define PAGE_SIZE               0x1000
  1057.  
  1058. #define PHYS_ADDR_PCI_MEM_BASE  0xfacefeed
  1059. #define PHYS_ADDR_PCI_CFG_BASE  0xfacefeed
  1060. #define PHYS_ADDR_IO_SPACE_BASE 0xfacefeed
  1061.  
  1062. #define READ_PORT_UCHAR(_P) *(volatile UCHAR * const)(_P)
  1063.  
  1064. #define READ_PORT_USHORT(_P) *(volatile USHORT * const)(_P)
  1065.  
  1066. #define READ_PORT_ULONG(_P) *(volatile ULONG * const)(_P)
  1067.  
  1068. #define READ_PORT_BUFFER_UCHAR(_P, _B, _C) \
  1069.         { \
  1070.           PUCHAR _ReadBuffer = _B; \
  1071.           ULONG _ReadCount = _C; \
  1072.           ULONG _Index; \
  1073.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1074.             *(_ReadBuffer++) = *(volatile UCHAR * const)(_P); \
  1075.         }
  1076.  
  1077. #define READ_PORT_BUFFER_USHORT(_P, _B, _C) \
  1078.         { \
  1079.           PUSHORT _ReadBuffer = _B; \
  1080.           ULONG _ReadCount = _C; \
  1081.           ULONG _Index; \
  1082.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1083.             *(_ReadBuffer++) = *(volatile USHORT * const)(_P); \
  1084.         }
  1085.  
  1086. #define READ_PORT_BUFFER_ULONG(_P, _B, _C) \
  1087.         { \
  1088.           PULONG _ReadBuffer = _B; \
  1089.           ULONG _ReadCount = _C; \
  1090.           ULONG _Index; \
  1091.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1092.             *(_ReadBuffer++) = *(volatile ULONG * const)(_P); \
  1093.         }
  1094.  
  1095. #define WRITE_PORT_UCHAR(_P, _V) \
  1096.         { \
  1097.           *(volatile UCHAR * const)(_P) = _V; \
  1098.           KeFlushWriteBuffer(); \
  1099.         }
  1100.  
  1101. #define WRITE_PORT_USHORT(_P, _V) \
  1102.         { \
  1103.           *(volatile USHORT * const)(_P) = _V; \
  1104.           KeFlushWriteBuffer(); \
  1105.         }
  1106.  
  1107. #define WRITE_PORT_ULONG(_P, _V) \
  1108.         { \
  1109.           *(volatile ULONG * const)(_P) = _V; \
  1110.           KeFlushWriteBuffer(); \
  1111.         }
  1112.  
  1113. #define WRITE_PORT_BUFFER_UCHAR(_P, _B, _C) \
  1114.         { \
  1115.           PUCHAR _WriteBuffer = _B; \
  1116.           ULONG _WriteCount = _C; \
  1117.           ULONG _Index; \
  1118.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  1119.             *(volatile UCHAR * const)(_P) = *(_WriteBuffer++); \
  1120.             KeFlushWriteBuffer();  \
  1121.           } \
  1122.         }
  1123.  
  1124. #define WRITE_PORT_BUFFER_USHORT(_P, _B, _C) \
  1125.         { \
  1126.           PUSHORT _WriteBuffer = _B; \
  1127.           ULONG _WriteCount = _C; \
  1128.           ULONG _Index; \
  1129.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  1130.             *(volatile USHORT * const)(_P) = *(_WriteBuffer++); \
  1131.             KeFlushWriteBuffer();  \
  1132.           } \
  1133.         }
  1134.  
  1135. #define WRITE_PORT_BUFFER_ULONG(_P, _B, _C) \
  1136.         { \
  1137.           PULONG _WriteBuffer = _B; \
  1138.           ULONG _WriteCount = _C; \
  1139.           ULONG _Index; \
  1140.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  1141.             *(volatile ULONG * const)(_P) = *(_WriteBuffer++); \
  1142.             KeFlushWriteBuffer();  \
  1143.           } \
  1144.         }
  1145.  
  1146. #define READ_REGISTER_UCHAR(_R) *(volatile UCHAR * const)(_R)
  1147.  
  1148. #define READ_REGISTER_USHORT(_R) *(volatile USHORT * const)(_R)
  1149.  
  1150. #define READ_REGISTER_ULONG(_R) *(volatile ULONG * const)(_R)
  1151.  
  1152. #define READ_REGISTER_BUFFER_UCHAR(_R, _B, _C) \
  1153.         { \
  1154.           PUCHAR _RegisterBuffer = _R; \
  1155.           PUCHAR _ReadBuffer = _B; \
  1156.           ULONG _ReadCount = _C; \
  1157.           ULONG _Index; \
  1158.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1159.             *(_ReadBuffer++) = *(volatile UCHAR * const)(_RegisterBuffer++); \
  1160.         }
  1161.  
  1162. #define READ_REGISTER_BUFFER_USHORT(_R, _B, _C) \
  1163.         { \
  1164.           PUSHORT _RegisterBuffer = _R; \
  1165.           PUSHORT _ReadBuffer = _B; \
  1166.           ULONG _ReadCount = _C; \
  1167.           ULONG _Index; \
  1168.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1169.             *(_ReadBuffer++) = *(volatile USHORT * const)(_RegisterBuffer++); \
  1170.         }
  1171.  
  1172. #define READ_REGISTER_BUFFER_ULONG(_R, _B, _C) \
  1173.         { \
  1174.           PULONG _RegisterBuffer = _R; \
  1175.           PULONG _ReadBuffer = _B; \
  1176.           ULONG _ReadCount = _C; \
  1177.           ULONG _Index; \
  1178.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1179.             *(_ReadBuffer++) = *(volatile ULONG * const)(_RegisterBuffer++); \
  1180.         }
  1181.  
  1182. #define WRITE_REGISTER_UCHAR(_R, _V) \
  1183.         { \
  1184.           *(volatile UCHAR * const)(_R) = _V; \
  1185.           KeFlushWriteBuffer(); \
  1186.         }
  1187.  
  1188. #define WRITE_REGISTER_USHORT(_R, _V) \
  1189.         { \
  1190.           *(volatile USHORT * const)(_R) = _V; \
  1191.           KeFlushWriteBuffer(); \
  1192.         }
  1193.  
  1194. #define WRITE_REGISTER_ULONG(_R, _V) \
  1195.         { \
  1196.           *(volatile ULONG * const)(_R) = _V; \
  1197.           KeFlushWriteBuffer(); \
  1198.         }
  1199.  
  1200. #define WRITE_REGISTER_BUFFER_UCHAR(_R, _B, _C) \
  1201.         { \
  1202.           PUCHAR _RegisterBuffer = _R; \
  1203.           PUCHAR _WriteBuffer = _B; \
  1204.           ULONG _WriteCount = _C; \
  1205.           ULONG _Index; \
  1206.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1207.             *(volatile UCHAR * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1208.           KeFlushWriteBuffer(); \
  1209.         }
  1210.  
  1211. #define WRITE_REGISTER_BUFFER_USHORT(_R, _B, _C) \
  1212.         { \
  1213.           PUSHORT _RegisterBuffer = _R; \
  1214.           PUSHORT _WriteBuffer = _B; \
  1215.           ULONG _WriteCount = _C; \
  1216.           ULONG _Index; \
  1217.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1218.             *(volatile USHORT * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1219.           KeFlushWriteBuffer(); \
  1220.         }
  1221.  
  1222. #define WRITE_REGISTER_BUFFER_ULONG(_R, _B, _C) \
  1223.         { \
  1224.           PULONG _RegisterBuffer = _R; \
  1225.           PULONG _WriteBuffer = _B; \
  1226.           ULONG _WriteCount = _C; \
  1227.           ULONG _Index; \
  1228.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1229.             *(volatile ULONG * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1230.           KeFlushWriteBuffer(); \
  1231.         }
  1232.  
  1233. ULONG
  1234. HalGetDmaAlignmentRequirement(
  1235.   VOID
  1236. );
  1237.  
  1238. VOID
  1239. KeFlushIoBuffers (
  1240.   IN PMDL Mdl,
  1241.   IN BOOLEAN ReadOperation,
  1242.   IN BOOLEAN DmaOperation
  1243. );
  1244. #endif /* PPC */
  1245.  
  1246.  
  1247. #if defined(SHx)
  1248. #define PAGE_SIZE               0x1000
  1249. #define PHYS_ADDR_PCI_MEM_BASE  0x04000000
  1250. #define PHYS_ADDR_PCI_CFG_BASE  0x12000000
  1251. #define PHYS_ADDR_IO_SPACE_BASE 0x10000000
  1252.  
  1253. #define READ_PORT_UCHAR(_P) *(volatile UCHAR * const)(_P)
  1254.  
  1255. #define READ_PORT_USHORT(_P) *(volatile USHORT * const)(_P)
  1256.  
  1257. #define READ_PORT_ULONG(_P) *(volatile ULONG * const)(_P)
  1258.  
  1259. #define READ_PORT_BUFFER_UCHAR(_P, _B, _C) \
  1260.         { \
  1261.           PUCHAR _ReadBuffer = _B; \
  1262.           ULONG _ReadCount = _C; \
  1263.           ULONG _Index; \
  1264.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1265.             *(_ReadBuffer++) = *(volatile UCHAR * const)(_P); \
  1266.         }
  1267.  
  1268. #define READ_PORT_BUFFER_USHORT(_P, _B, _C) \
  1269.         { \
  1270.           PUSHORT _ReadBuffer = _B; \
  1271.           ULONG _ReadCount = _C; \
  1272.           ULONG _Index; \
  1273.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1274.             *(_ReadBuffer++) = *(volatile USHORT * const)(_P); \
  1275.         }
  1276.  
  1277. #define READ_PORT_BUFFER_ULONG(_P, _B, _C) \
  1278.         { \
  1279.           PULONG _ReadBuffer = _B; \
  1280.           ULONG _ReadCount = _C; \
  1281.           ULONG _Index; \
  1282.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1283.             *(_ReadBuffer++) = *(volatile ULONG * const)(_P); \
  1284.         }
  1285.  
  1286. #define WRITE_PORT_UCHAR(_P, _V) \
  1287.         { \
  1288.           *(volatile UCHAR * const)(_P) = _V; \
  1289.           KeFlushWriteBuffer(); \
  1290.         }
  1291.  
  1292. #define WRITE_PORT_USHORT(_P, _V) \
  1293.         { \
  1294.           *(volatile USHORT * const)(_P) = _V; \
  1295.           KeFlushWriteBuffer(); \
  1296.         }
  1297.  
  1298. #define WRITE_PORT_ULONG(_P, _V) \
  1299.         { \
  1300.           *(volatile ULONG * const)(_P) = _V; \
  1301.           KeFlushWriteBuffer(); \
  1302.         }
  1303.  
  1304. #define WRITE_PORT_BUFFER_UCHAR(_P, _B, _C) \
  1305.         { \
  1306.           PUCHAR _WriteBuffer = _B; \
  1307.           ULONG _WriteCount = _C; \
  1308.           ULONG _Index; \
  1309.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  1310.             *(volatile UCHAR * const)(_P) = *(_WriteBuffer++); \
  1311.             KeFlushWriteBuffer();  \
  1312.           } \
  1313.         }
  1314.  
  1315. #define WRITE_PORT_BUFFER_USHORT(_P, _B, _C) \
  1316.         { \
  1317.           PUSHORT _WriteBuffer = _B; \
  1318.           ULONG _WriteCount = _C; \
  1319.           ULONG _Index; \
  1320.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  1321.             *(volatile USHORT * const)(_P) = *(_WriteBuffer++); \
  1322.             KeFlushWriteBuffer();  \
  1323.           } \
  1324.         }
  1325.  
  1326. #define WRITE_PORT_BUFFER_ULONG(_P, _B, _C) \
  1327.         { \
  1328.           PULONG _WriteBuffer = _B; \
  1329.           ULONG _WriteCount = _C; \
  1330.           ULONG _Index; \
  1331.           for (_Index=0; _Index<_WriteCount; _Index++) { \
  1332.             *(volatile ULONG * const)(_P) = *(_WriteBuffer++); \
  1333.             KeFlushWriteBuffer();  \
  1334.           } \
  1335.         }
  1336.  
  1337. #define READ_REGISTER_UCHAR(_R) *(volatile UCHAR * const)(_R)
  1338.  
  1339. #define READ_REGISTER_USHORT(_R) *(volatile USHORT * const)(_R)
  1340.  
  1341. #define READ_REGISTER_ULONG(_R) *(volatile ULONG * const)(_R)
  1342.  
  1343. #define READ_REGISTER_BUFFER_UCHAR(_R, _B, _C) \
  1344.         { \
  1345.           PUCHAR _RegisterBuffer = _R; \
  1346.           PUCHAR _ReadBuffer = _B; \
  1347.           ULONG _ReadCount = _C; \
  1348.           ULONG _Index; \
  1349.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1350.             *(_ReadBuffer++) = *(volatile UCHAR * const)(_RegisterBuffer++); \
  1351.         }
  1352.  
  1353. #define READ_REGISTER_BUFFER_USHORT(_R, _B, _C) \
  1354.         { \
  1355.           PUSHORT _RegisterBuffer = _R; \
  1356.           PUSHORT _ReadBuffer = _B; \
  1357.           ULONG _ReadCount = _C; \
  1358.           ULONG _Index; \
  1359.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1360.             *(_ReadBuffer++) = *(volatile USHORT * const)(_RegisterBuffer++); \
  1361.         }
  1362.  
  1363. #define READ_REGISTER_BUFFER_ULONG(_R, _B, _C) \
  1364.         { \
  1365.           PULONG _RegisterBuffer = _R; \
  1366.           PULONG _ReadBuffer = _B; \
  1367.           ULONG _ReadCount = _C; \
  1368.           ULONG _Index; \
  1369.           for (_Index=0; _Index<_ReadCount; _Index++) \
  1370.             *(_ReadBuffer++) = *(volatile ULONG * const)(_RegisterBuffer++); \
  1371.         }
  1372.  
  1373. #define WRITE_REGISTER_UCHAR(_R, _V) \
  1374.         { \
  1375.           *(volatile UCHAR * const)(_R) = _V; \
  1376.           KeFlushWriteBuffer(); \
  1377.         }
  1378.  
  1379. #define WRITE_REGISTER_USHORT(_R, _V) \
  1380.         { \
  1381.           *(volatile USHORT * const)(_R) = _V; \
  1382.           KeFlushWriteBuffer(); \
  1383.         }
  1384.  
  1385. #define WRITE_REGISTER_ULONG(_R, _V) \
  1386.         { \
  1387.           *(volatile ULONG * const)(_R) = _V; \
  1388.           KeFlushWriteBuffer(); \
  1389.         }
  1390.  
  1391. #define WRITE_REGISTER_BUFFER_UCHAR(_R, _B, _C) \
  1392.         { \
  1393.           PUCHAR _RegisterBuffer = _R; \
  1394.           PUCHAR _WriteBuffer = _B; \
  1395.           ULONG _WriteCount = _C; \
  1396.           ULONG _Index; \
  1397.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1398.             *(volatile UCHAR * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1399.           KeFlushWriteBuffer(); \
  1400.         }
  1401.  
  1402. #define WRITE_REGISTER_BUFFER_USHORT(_R, _B, _C) \
  1403.         { \
  1404.           PUSHORT _RegisterBuffer = _R; \
  1405.           PUSHORT _WriteBuffer = _B; \
  1406.           ULONG _WriteCount = _C; \
  1407.           ULONG _Index; \
  1408.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1409.             *(volatile USHORT * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1410.           KeFlushWriteBuffer(); \
  1411.         }
  1412.  
  1413. #define WRITE_REGISTER_BUFFER_ULONG(_R, _B, _C) \
  1414.         { \
  1415.           PULONG _RegisterBuffer = _R; \
  1416.           PULONG _WriteBuffer = _B; \
  1417.           ULONG _WriteCount = _C; \
  1418.           ULONG _Index; \
  1419.           for (_Index=0; _Index<_WriteCount; _Index++) \
  1420.             *(volatile ULONG * const)(_RegisterBuffer++) = *(_WriteBuffer++); \
  1421.           KeFlushWriteBuffer(); \
  1422.         }
  1423.  
  1424. ULONG
  1425. HalGetDmaAlignmentRequirement(
  1426.   VOID
  1427. );
  1428.  
  1429. VOID
  1430. KeFlushIoBuffers (
  1431.   IN PMDL Mdl,
  1432.   IN BOOLEAN ReadOperation,
  1433.   IN BOOLEAN DmaOperation
  1434. );
  1435. #endif /* SHx */
  1436.  
  1437. #ifdef __cplusplus
  1438. }
  1439. #endif
  1440.  
  1441. #endif
  1442.