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Text File  |  2002-07-08  |  162 b   |  10 lines
  1.  
  2. // Logic Definition for 1/2 74XX139
  3.  
  4. PORT Address    in[0:1] ;
  5. PORT E_Inv     in[2] ;
  6.  
  7. PORT Out        out[0:3] ;
  8.  
  9. Out = (!E_Inv) ? ~(1<<Address) : 7 ;
  10.