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C/C++ Source or Header  |  2008-12-24  |  69.8 KB  |  1,187 lines
  1. /*
  2.  * wm8400 private definitions for audio
  3.  *
  4.  * Copyright 2008 Wolfson Microelectronics plc
  5.  *
  6.  * This program is free software; you can redistribute it and/or modify
  7.  * it under the terms of the GNU General Public License as published by
  8.  * the Free Software Foundation; either version 2 of the License, or
  9.  * (at your option) any later version.
  10.  *
  11.  * This program is distributed in the hope that it will be useful,
  12.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14.  * GNU General Public License for more details.
  15.  *
  16.  * You should have received a copy of the GNU General Public License
  17.  * along with this program; if not, write to the Free Software
  18.  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19.  */
  20.  
  21. #ifndef __LINUX_MFD_WM8400_AUDIO_H
  22. #define __LINUX_MFD_WM8400_AUDIO_H
  23.  
  24. #include <linux/mfd/wm8400-audio.h>
  25.  
  26. /*
  27.  * R2 (0x02) - Power Management (1)
  28.  */
  29. #define WM8400_CODEC_ENA                        0x8000  /* CODEC_ENA */
  30. #define WM8400_CODEC_ENA_MASK                   0x8000  /* CODEC_ENA */
  31. #define WM8400_CODEC_ENA_SHIFT                      15  /* CODEC_ENA */
  32. #define WM8400_CODEC_ENA_WIDTH                       1  /* CODEC_ENA */
  33. #define WM8400_SYSCLK_ENA                       0x4000  /* SYSCLK_ENA */
  34. #define WM8400_SYSCLK_ENA_MASK                  0x4000  /* SYSCLK_ENA */
  35. #define WM8400_SYSCLK_ENA_SHIFT                     14  /* SYSCLK_ENA */
  36. #define WM8400_SYSCLK_ENA_WIDTH                      1  /* SYSCLK_ENA */
  37. #define WM8400_SPK_MIX_ENA                      0x2000  /* SPK_MIX_ENA */
  38. #define WM8400_SPK_MIX_ENA_MASK                 0x2000  /* SPK_MIX_ENA */
  39. #define WM8400_SPK_MIX_ENA_SHIFT                    13  /* SPK_MIX_ENA */
  40. #define WM8400_SPK_MIX_ENA_WIDTH                     1  /* SPK_MIX_ENA */
  41. #define WM8400_SPK_ENA                          0x1000  /* SPK_ENA */
  42. #define WM8400_SPK_ENA_MASK                     0x1000  /* SPK_ENA */
  43. #define WM8400_SPK_ENA_SHIFT                        12  /* SPK_ENA */
  44. #define WM8400_SPK_ENA_WIDTH                         1  /* SPK_ENA */
  45. #define WM8400_OUT3_ENA                         0x0800  /* OUT3_ENA */
  46. #define WM8400_OUT3_ENA_MASK                    0x0800  /* OUT3_ENA */
  47. #define WM8400_OUT3_ENA_SHIFT                       11  /* OUT3_ENA */
  48. #define WM8400_OUT3_ENA_WIDTH                        1  /* OUT3_ENA */
  49. #define WM8400_OUT4_ENA                         0x0400  /* OUT4_ENA */
  50. #define WM8400_OUT4_ENA_MASK                    0x0400  /* OUT4_ENA */
  51. #define WM8400_OUT4_ENA_SHIFT                       10  /* OUT4_ENA */
  52. #define WM8400_OUT4_ENA_WIDTH                        1  /* OUT4_ENA */
  53. #define WM8400_LOUT_ENA                         0x0200  /* LOUT_ENA */
  54. #define WM8400_LOUT_ENA_MASK                    0x0200  /* LOUT_ENA */
  55. #define WM8400_LOUT_ENA_SHIFT                        9  /* LOUT_ENA */
  56. #define WM8400_LOUT_ENA_WIDTH                        1  /* LOUT_ENA */
  57. #define WM8400_ROUT_ENA                         0x0100  /* ROUT_ENA */
  58. #define WM8400_ROUT_ENA_MASK                    0x0100  /* ROUT_ENA */
  59. #define WM8400_ROUT_ENA_SHIFT                        8  /* ROUT_ENA */
  60. #define WM8400_ROUT_ENA_WIDTH                        1  /* ROUT_ENA */
  61. #define WM8400_MIC1BIAS_ENA                     0x0010  /* MIC1BIAS_ENA */
  62. #define WM8400_MIC1BIAS_ENA_MASK                0x0010  /* MIC1BIAS_ENA */
  63. #define WM8400_MIC1BIAS_ENA_SHIFT                    4  /* MIC1BIAS_ENA */
  64. #define WM8400_MIC1BIAS_ENA_WIDTH                    1  /* MIC1BIAS_ENA */
  65. #define WM8400_VMID_MODE_MASK                   0x0006  /* VMID_MODE - [2:1] */
  66. #define WM8400_VMID_MODE_SHIFT                       1  /* VMID_MODE - [2:1] */
  67. #define WM8400_VMID_MODE_WIDTH                       2  /* VMID_MODE - [2:1] */
  68. #define WM8400_VREF_ENA                         0x0001  /* VREF_ENA */
  69. #define WM8400_VREF_ENA_MASK                    0x0001  /* VREF_ENA */
  70. #define WM8400_VREF_ENA_SHIFT                        0  /* VREF_ENA */
  71. #define WM8400_VREF_ENA_WIDTH                        1  /* VREF_ENA */
  72.  
  73. /*
  74.  * R3 (0x03) - Power Management (2)
  75.  */
  76. #define WM8400_FLL_ENA                          0x8000  /* FLL_ENA */
  77. #define WM8400_FLL_ENA_MASK                     0x8000  /* FLL_ENA */
  78. #define WM8400_FLL_ENA_SHIFT                        15  /* FLL_ENA */
  79. #define WM8400_FLL_ENA_WIDTH                         1  /* FLL_ENA */
  80. #define WM8400_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
  81. #define WM8400_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
  82. #define WM8400_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
  83. #define WM8400_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
  84. #define WM8400_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
  85. #define WM8400_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
  86. #define WM8400_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
  87. #define WM8400_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
  88. #define WM8400_OPCLK_ENA                        0x0800  /* OPCLK_ENA */
  89. #define WM8400_OPCLK_ENA_MASK                   0x0800  /* OPCLK_ENA */
  90. #define WM8400_OPCLK_ENA_SHIFT                      11  /* OPCLK_ENA */
  91. #define WM8400_OPCLK_ENA_WIDTH                       1  /* OPCLK_ENA */
  92. #define WM8400_AINL_ENA                         0x0200  /* AINL_ENA */
  93. #define WM8400_AINL_ENA_MASK                    0x0200  /* AINL_ENA */
  94. #define WM8400_AINL_ENA_SHIFT                        9  /* AINL_ENA */
  95. #define WM8400_AINL_ENA_WIDTH                        1  /* AINL_ENA */
  96. #define WM8400_AINR_ENA                         0x0100  /* AINR_ENA */
  97. #define WM8400_AINR_ENA_MASK                    0x0100  /* AINR_ENA */
  98. #define WM8400_AINR_ENA_SHIFT                        8  /* AINR_ENA */
  99. #define WM8400_AINR_ENA_WIDTH                        1  /* AINR_ENA */
  100. #define WM8400_LIN34_ENA                        0x0080  /* LIN34_ENA */
  101. #define WM8400_LIN34_ENA_MASK                   0x0080  /* LIN34_ENA */
  102. #define WM8400_LIN34_ENA_SHIFT                       7  /* LIN34_ENA */
  103. #define WM8400_LIN34_ENA_WIDTH                       1  /* LIN34_ENA */
  104. #define WM8400_LIN12_ENA                        0x0040  /* LIN12_ENA */
  105. #define WM8400_LIN12_ENA_MASK                   0x0040  /* LIN12_ENA */
  106. #define WM8400_LIN12_ENA_SHIFT                       6  /* LIN12_ENA */
  107. #define WM8400_LIN12_ENA_WIDTH                       1  /* LIN12_ENA */
  108. #define WM8400_RIN34_ENA                        0x0020  /* RIN34_ENA */
  109. #define WM8400_RIN34_ENA_MASK                   0x0020  /* RIN34_ENA */
  110. #define WM8400_RIN34_ENA_SHIFT                       5  /* RIN34_ENA */
  111. #define WM8400_RIN34_ENA_WIDTH                       1  /* RIN34_ENA */
  112. #define WM8400_RIN12_ENA                        0x0010  /* RIN12_ENA */
  113. #define WM8400_RIN12_ENA_MASK                   0x0010  /* RIN12_ENA */
  114. #define WM8400_RIN12_ENA_SHIFT                       4  /* RIN12_ENA */
  115. #define WM8400_RIN12_ENA_WIDTH                       1  /* RIN12_ENA */
  116. #define WM8400_ADCL_ENA                         0x0002  /* ADCL_ENA */
  117. #define WM8400_ADCL_ENA_MASK                    0x0002  /* ADCL_ENA */
  118. #define WM8400_ADCL_ENA_SHIFT                        1  /* ADCL_ENA */
  119. #define WM8400_ADCL_ENA_WIDTH                        1  /* ADCL_ENA */
  120. #define WM8400_ADCR_ENA                         0x0001  /* ADCR_ENA */
  121. #define WM8400_ADCR_ENA_MASK                    0x0001  /* ADCR_ENA */
  122. #define WM8400_ADCR_ENA_SHIFT                        0  /* ADCR_ENA */
  123. #define WM8400_ADCR_ENA_WIDTH                        1  /* ADCR_ENA */
  124.  
  125. /*
  126.  * R4 (0x04) - Power Management (3)
  127.  */
  128. #define WM8400_LON_ENA                          0x2000  /* LON_ENA */
  129. #define WM8400_LON_ENA_MASK                     0x2000  /* LON_ENA */
  130. #define WM8400_LON_ENA_SHIFT                        13  /* LON_ENA */
  131. #define WM8400_LON_ENA_WIDTH                         1  /* LON_ENA */
  132. #define WM8400_LOP_ENA                          0x1000  /* LOP_ENA */
  133. #define WM8400_LOP_ENA_MASK                     0x1000  /* LOP_ENA */
  134. #define WM8400_LOP_ENA_SHIFT                        12  /* LOP_ENA */
  135. #define WM8400_LOP_ENA_WIDTH                         1  /* LOP_ENA */
  136. #define WM8400_RON_ENA                          0x0800  /* RON_ENA */
  137. #define WM8400_RON_ENA_MASK                     0x0800  /* RON_ENA */
  138. #define WM8400_RON_ENA_SHIFT                        11  /* RON_ENA */
  139. #define WM8400_RON_ENA_WIDTH                         1  /* RON_ENA */
  140. #define WM8400_ROP_ENA                          0x0400  /* ROP_ENA */
  141. #define WM8400_ROP_ENA_MASK                     0x0400  /* ROP_ENA */
  142. #define WM8400_ROP_ENA_SHIFT                        10  /* ROP_ENA */
  143. #define WM8400_ROP_ENA_WIDTH                         1  /* ROP_ENA */
  144. #define WM8400_LOPGA_ENA                        0x0080  /* LOPGA_ENA */
  145. #define WM8400_LOPGA_ENA_MASK                   0x0080  /* LOPGA_ENA */
  146. #define WM8400_LOPGA_ENA_SHIFT                       7  /* LOPGA_ENA */
  147. #define WM8400_LOPGA_ENA_WIDTH                       1  /* LOPGA_ENA */
  148. #define WM8400_ROPGA_ENA                        0x0040  /* ROPGA_ENA */
  149. #define WM8400_ROPGA_ENA_MASK                   0x0040  /* ROPGA_ENA */
  150. #define WM8400_ROPGA_ENA_SHIFT                       6  /* ROPGA_ENA */
  151. #define WM8400_ROPGA_ENA_WIDTH                       1  /* ROPGA_ENA */
  152. #define WM8400_LOMIX_ENA                        0x0020  /* LOMIX_ENA */
  153. #define WM8400_LOMIX_ENA_MASK                   0x0020  /* LOMIX_ENA */
  154. #define WM8400_LOMIX_ENA_SHIFT                       5  /* LOMIX_ENA */
  155. #define WM8400_LOMIX_ENA_WIDTH                       1  /* LOMIX_ENA */
  156. #define WM8400_ROMIX_ENA                        0x0010  /* ROMIX_ENA */
  157. #define WM8400_ROMIX_ENA_MASK                   0x0010  /* ROMIX_ENA */
  158. #define WM8400_ROMIX_ENA_SHIFT                       4  /* ROMIX_ENA */
  159. #define WM8400_ROMIX_ENA_WIDTH                       1  /* ROMIX_ENA */
  160. #define WM8400_DACL_ENA                         0x0002  /* DACL_ENA */
  161. #define WM8400_DACL_ENA_MASK                    0x0002  /* DACL_ENA */
  162. #define WM8400_DACL_ENA_SHIFT                        1  /* DACL_ENA */
  163. #define WM8400_DACL_ENA_WIDTH                        1  /* DACL_ENA */
  164. #define WM8400_DACR_ENA                         0x0001  /* DACR_ENA */
  165. #define WM8400_DACR_ENA_MASK                    0x0001  /* DACR_ENA */
  166. #define WM8400_DACR_ENA_SHIFT                        0  /* DACR_ENA */
  167. #define WM8400_DACR_ENA_WIDTH                        1  /* DACR_ENA */
  168.  
  169. /*
  170.  * R5 (0x05) - Audio Interface (1)
  171.  */
  172. #define WM8400_AIFADCL_SRC                      0x8000  /* AIFADCL_SRC */
  173. #define WM8400_AIFADCL_SRC_MASK                 0x8000  /* AIFADCL_SRC */
  174. #define WM8400_AIFADCL_SRC_SHIFT                    15  /* AIFADCL_SRC */
  175. #define WM8400_AIFADCL_SRC_WIDTH                     1  /* AIFADCL_SRC */
  176. #define WM8400_AIFADCR_SRC                      0x4000  /* AIFADCR_SRC */
  177. #define WM8400_AIFADCR_SRC_MASK                 0x4000  /* AIFADCR_SRC */
  178. #define WM8400_AIFADCR_SRC_SHIFT                    14  /* AIFADCR_SRC */
  179. #define WM8400_AIFADCR_SRC_WIDTH                     1  /* AIFADCR_SRC */
  180. #define WM8400_AIFADC_TDM                       0x2000  /* AIFADC_TDM */
  181. #define WM8400_AIFADC_TDM_MASK                  0x2000  /* AIFADC_TDM */
  182. #define WM8400_AIFADC_TDM_SHIFT                     13  /* AIFADC_TDM */
  183. #define WM8400_AIFADC_TDM_WIDTH                      1  /* AIFADC_TDM */
  184. #define WM8400_AIFADC_TDM_CHAN                  0x1000  /* AIFADC_TDM_CHAN */
  185. #define WM8400_AIFADC_TDM_CHAN_MASK             0x1000  /* AIFADC_TDM_CHAN */
  186. #define WM8400_AIFADC_TDM_CHAN_SHIFT                12  /* AIFADC_TDM_CHAN */
  187. #define WM8400_AIFADC_TDM_CHAN_WIDTH                 1  /* AIFADC_TDM_CHAN */
  188. #define WM8400_AIF_BCLK_INV                     0x0100  /* AIF_BCLK_INV */
  189. #define WM8400_AIF_BCLK_INV_MASK                0x0100  /* AIF_BCLK_INV */
  190. #define WM8400_AIF_BCLK_INV_SHIFT                    8  /* AIF_BCLK_INV */
  191. #define WM8400_AIF_BCLK_INV_WIDTH                    1  /* AIF_BCLK_INV */
  192. #define WM8400_AIF_LRCLK_INV                    0x0080  /* AIF_LRCLK_INV */
  193. #define WM8400_AIF_LRCLK_INV_MASK               0x0080  /* AIF_LRCLK_INV */
  194. #define WM8400_AIF_LRCLK_INV_SHIFT                   7  /* AIF_LRCLK_INV */
  195. #define WM8400_AIF_LRCLK_INV_WIDTH                   1  /* AIF_LRCLK_INV */
  196. #define WM8400_AIF_WL_MASK                      0x0060  /* AIF_WL - [6:5] */
  197. #define WM8400_AIF_WL_SHIFT                          5  /* AIF_WL - [6:5] */
  198. #define WM8400_AIF_WL_WIDTH                          2  /* AIF_WL - [6:5] */
  199. #define WM8400_AIF_WL_16BITS            (0 << 5)
  200. #define WM8400_AIF_WL_20BITS            (1 << 5)
  201. #define WM8400_AIF_WL_24BITS            (2 << 5)
  202. #define WM8400_AIF_WL_32BITS            (3 << 5)
  203. #define WM8400_AIF_FMT_MASK                     0x0018  /* AIF_FMT - [4:3] */
  204. #define WM8400_AIF_FMT_SHIFT                         3  /* AIF_FMT - [4:3] */
  205. #define WM8400_AIF_FMT_WIDTH                         2  /* AIF_FMT - [4:3] */
  206. #define WM8400_AIF_FMT_RIGHTJ            (0 << 3)
  207. #define WM8400_AIF_FMT_LEFTJ            (1 << 3)
  208. #define WM8400_AIF_FMT_I2S            (2 << 3)
  209. #define WM8400_AIF_FMT_DSP            (3 << 3)
  210.  
  211. /*
  212.  * R6 (0x06) - Audio Interface (2)
  213.  */
  214. #define WM8400_DACL_SRC                         0x8000  /* DACL_SRC */
  215. #define WM8400_DACL_SRC_MASK                    0x8000  /* DACL_SRC */
  216. #define WM8400_DACL_SRC_SHIFT                       15  /* DACL_SRC */
  217. #define WM8400_DACL_SRC_WIDTH                        1  /* DACL_SRC */
  218. #define WM8400_DACR_SRC                         0x4000  /* DACR_SRC */
  219. #define WM8400_DACR_SRC_MASK                    0x4000  /* DACR_SRC */
  220. #define WM8400_DACR_SRC_SHIFT                       14  /* DACR_SRC */
  221. #define WM8400_DACR_SRC_WIDTH                        1  /* DACR_SRC */
  222. #define WM8400_AIFDAC_TDM                       0x2000  /* AIFDAC_TDM */
  223. #define WM8400_AIFDAC_TDM_MASK                  0x2000  /* AIFDAC_TDM */
  224. #define WM8400_AIFDAC_TDM_SHIFT                     13  /* AIFDAC_TDM */
  225. #define WM8400_AIFDAC_TDM_WIDTH                      1  /* AIFDAC_TDM */
  226. #define WM8400_AIFDAC_TDM_CHAN                  0x1000  /* AIFDAC_TDM_CHAN */
  227. #define WM8400_AIFDAC_TDM_CHAN_MASK             0x1000  /* AIFDAC_TDM_CHAN */
  228. #define WM8400_AIFDAC_TDM_CHAN_SHIFT                12  /* AIFDAC_TDM_CHAN */
  229. #define WM8400_AIFDAC_TDM_CHAN_WIDTH                 1  /* AIFDAC_TDM_CHAN */
  230. #define WM8400_DAC_BOOST_MASK                   0x0C00  /* DAC_BOOST - [11:10] */
  231. #define WM8400_DAC_BOOST_SHIFT                      10  /* DAC_BOOST - [11:10] */
  232. #define WM8400_DAC_BOOST_WIDTH                       2  /* DAC_BOOST - [11:10] */
  233. #define WM8400_DAC_COMP                         0x0010  /* DAC_COMP */
  234. #define WM8400_DAC_COMP_MASK                    0x0010  /* DAC_COMP */
  235. #define WM8400_DAC_COMP_SHIFT                        4  /* DAC_COMP */
  236. #define WM8400_DAC_COMP_WIDTH                        1  /* DAC_COMP */
  237. #define WM8400_DAC_COMPMODE                     0x0008  /* DAC_COMPMODE */
  238. #define WM8400_DAC_COMPMODE_MASK                0x0008  /* DAC_COMPMODE */
  239. #define WM8400_DAC_COMPMODE_SHIFT                    3  /* DAC_COMPMODE */
  240. #define WM8400_DAC_COMPMODE_WIDTH                    1  /* DAC_COMPMODE */
  241. #define WM8400_ADC_COMP                         0x0004  /* ADC_COMP */
  242. #define WM8400_ADC_COMP_MASK                    0x0004  /* ADC_COMP */
  243. #define WM8400_ADC_COMP_SHIFT                        2  /* ADC_COMP */
  244. #define WM8400_ADC_COMP_WIDTH                        1  /* ADC_COMP */
  245. #define WM8400_ADC_COMPMODE                     0x0002  /* ADC_COMPMODE */
  246. #define WM8400_ADC_COMPMODE_MASK                0x0002  /* ADC_COMPMODE */
  247. #define WM8400_ADC_COMPMODE_SHIFT                    1  /* ADC_COMPMODE */
  248. #define WM8400_ADC_COMPMODE_WIDTH                    1  /* ADC_COMPMODE */
  249. #define WM8400_LOOPBACK                         0x0001  /* LOOPBACK */
  250. #define WM8400_LOOPBACK_MASK                    0x0001  /* LOOPBACK */
  251. #define WM8400_LOOPBACK_SHIFT                        0  /* LOOPBACK */
  252. #define WM8400_LOOPBACK_WIDTH                        1  /* LOOPBACK */
  253.  
  254. /*
  255.  * R7 (0x07) - Clocking (1)
  256.  */
  257. #define WM8400_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
  258. #define WM8400_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
  259. #define WM8400_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
  260. #define WM8400_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
  261. #define WM8400_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
  262. #define WM8400_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
  263. #define WM8400_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
  264. #define WM8400_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
  265. #define WM8400_OPCLKDIV_MASK                    0x1E00  /* OPCLKDIV - [12:9] */
  266. #define WM8400_OPCLKDIV_SHIFT                        9  /* OPCLKDIV - [12:9] */
  267. #define WM8400_OPCLKDIV_WIDTH                        4  /* OPCLKDIV - [12:9] */
  268. #define WM8400_DCLKDIV_MASK                     0x01C0  /* DCLKDIV - [8:6] */
  269. #define WM8400_DCLKDIV_SHIFT                         6  /* DCLKDIV - [8:6] */
  270. #define WM8400_DCLKDIV_WIDTH                         3  /* DCLKDIV - [8:6] */
  271. #define WM8400_BCLK_DIV_MASK                    0x001E  /* BCLK_DIV - [4:1] */
  272. #define WM8400_BCLK_DIV_SHIFT                        1  /* BCLK_DIV - [4:1] */
  273. #define WM8400_BCLK_DIV_WIDTH                        4  /* BCLK_DIV - [4:1] */
  274.  
  275. /*
  276.  * R8 (0x08) - Clocking (2)
  277.  */
  278. #define WM8400_MCLK_SRC                         0x8000  /* MCLK_SRC */
  279. #define WM8400_MCLK_SRC_MASK                    0x8000  /* MCLK_SRC */
  280. #define WM8400_MCLK_SRC_SHIFT                       15  /* MCLK_SRC */
  281. #define WM8400_MCLK_SRC_WIDTH                        1  /* MCLK_SRC */
  282. #define WM8400_SYSCLK_SRC                       0x4000  /* SYSCLK_SRC */
  283. #define WM8400_SYSCLK_SRC_MASK                  0x4000  /* SYSCLK_SRC */
  284. #define WM8400_SYSCLK_SRC_SHIFT                     14  /* SYSCLK_SRC */
  285. #define WM8400_SYSCLK_SRC_WIDTH                      1  /* SYSCLK_SRC */
  286. #define WM8400_CLK_FORCE                        0x2000  /* CLK_FORCE */
  287. #define WM8400_CLK_FORCE_MASK                   0x2000  /* CLK_FORCE */
  288. #define WM8400_CLK_FORCE_SHIFT                      13  /* CLK_FORCE */
  289. #define WM8400_CLK_FORCE_WIDTH                       1  /* CLK_FORCE */
  290. #define WM8400_MCLK_DIV_MASK                    0x1800  /* MCLK_DIV - [12:11] */
  291. #define WM8400_MCLK_DIV_SHIFT                       11  /* MCLK_DIV - [12:11] */
  292. #define WM8400_MCLK_DIV_WIDTH                        2  /* MCLK_DIV - [12:11] */
  293. #define WM8400_MCLK_INV                         0x0400  /* MCLK_INV */
  294. #define WM8400_MCLK_INV_MASK                    0x0400  /* MCLK_INV */
  295. #define WM8400_MCLK_INV_SHIFT                       10  /* MCLK_INV */
  296. #define WM8400_MCLK_INV_WIDTH                        1  /* MCLK_INV */
  297. #define WM8400_ADC_CLKDIV_MASK                  0x00E0  /* ADC_CLKDIV - [7:5] */
  298. #define WM8400_ADC_CLKDIV_SHIFT                      5  /* ADC_CLKDIV - [7:5] */
  299. #define WM8400_ADC_CLKDIV_WIDTH                      3  /* ADC_CLKDIV - [7:5] */
  300. #define WM8400_DAC_CLKDIV_MASK                  0x001C  /* DAC_CLKDIV - [4:2] */
  301. #define WM8400_DAC_CLKDIV_SHIFT                      2  /* DAC_CLKDIV - [4:2] */
  302. #define WM8400_DAC_CLKDIV_WIDTH                      3  /* DAC_CLKDIV - [4:2] */
  303.  
  304. /*
  305.  * R9 (0x09) - Audio Interface (3)
  306.  */
  307. #define WM8400_AIF_MSTR1                        0x8000  /* AIF_MSTR1 */
  308. #define WM8400_AIF_MSTR1_MASK                   0x8000  /* AIF_MSTR1 */
  309. #define WM8400_AIF_MSTR1_SHIFT                      15  /* AIF_MSTR1 */
  310. #define WM8400_AIF_MSTR1_WIDTH                       1  /* AIF_MSTR1 */
  311. #define WM8400_AIF_MSTR2                        0x4000  /* AIF_MSTR2 */
  312. #define WM8400_AIF_MSTR2_MASK                   0x4000  /* AIF_MSTR2 */
  313. #define WM8400_AIF_MSTR2_SHIFT                      14  /* AIF_MSTR2 */
  314. #define WM8400_AIF_MSTR2_WIDTH                       1  /* AIF_MSTR2 */
  315. #define WM8400_AIF_SEL                          0x2000  /* AIF_SEL */
  316. #define WM8400_AIF_SEL_MASK                     0x2000  /* AIF_SEL */
  317. #define WM8400_AIF_SEL_SHIFT                        13  /* AIF_SEL */
  318. #define WM8400_AIF_SEL_WIDTH                         1  /* AIF_SEL */
  319. #define WM8400_ADCLRC_DIR                       0x0800  /* ADCLRC_DIR */
  320. #define WM8400_ADCLRC_DIR_MASK                  0x0800  /* ADCLRC_DIR */
  321. #define WM8400_ADCLRC_DIR_SHIFT                     11  /* ADCLRC_DIR */
  322. #define WM8400_ADCLRC_DIR_WIDTH                      1  /* ADCLRC_DIR */
  323. #define WM8400_ADCLRC_RATE_MASK                 0x07FF  /* ADCLRC_RATE - [10:0] */
  324. #define WM8400_ADCLRC_RATE_SHIFT                     0  /* ADCLRC_RATE - [10:0] */
  325. #define WM8400_ADCLRC_RATE_WIDTH                    11  /* ADCLRC_RATE - [10:0] */
  326.  
  327. /*
  328.  * R10 (0x0A) - Audio Interface (4)
  329.  */
  330. #define WM8400_ALRCGPIO1                        0x8000  /* ALRCGPIO1 */
  331. #define WM8400_ALRCGPIO1_MASK                   0x8000  /* ALRCGPIO1 */
  332. #define WM8400_ALRCGPIO1_SHIFT                      15  /* ALRCGPIO1 */
  333. #define WM8400_ALRCGPIO1_WIDTH                       1  /* ALRCGPIO1 */
  334. #define WM8400_ALRCBGPIO6                       0x4000  /* ALRCBGPIO6 */
  335. #define WM8400_ALRCBGPIO6_MASK                  0x4000  /* ALRCBGPIO6 */
  336. #define WM8400_ALRCBGPIO6_SHIFT                     14  /* ALRCBGPIO6 */
  337. #define WM8400_ALRCBGPIO6_WIDTH                      1  /* ALRCBGPIO6 */
  338. #define WM8400_AIF_TRIS                         0x2000  /* AIF_TRIS */
  339. #define WM8400_AIF_TRIS_MASK                    0x2000  /* AIF_TRIS */
  340. #define WM8400_AIF_TRIS_SHIFT                       13  /* AIF_TRIS */
  341. #define WM8400_AIF_TRIS_WIDTH                        1  /* AIF_TRIS */
  342. #define WM8400_DACLRC_DIR                       0x0800  /* DACLRC_DIR */
  343. #define WM8400_DACLRC_DIR_MASK                  0x0800  /* DACLRC_DIR */
  344. #define WM8400_DACLRC_DIR_SHIFT                     11  /* DACLRC_DIR */
  345. #define WM8400_DACLRC_DIR_WIDTH                      1  /* DACLRC_DIR */
  346. #define WM8400_DACLRC_RATE_MASK                 0x07FF  /* DACLRC_RATE - [10:0] */
  347. #define WM8400_DACLRC_RATE_SHIFT                     0  /* DACLRC_RATE - [10:0] */
  348. #define WM8400_DACLRC_RATE_WIDTH                    11  /* DACLRC_RATE - [10:0] */
  349.  
  350. /*
  351.  * R11 (0x0B) - DAC CTRL
  352.  */
  353. #define WM8400_DAC_SDMCLK_RATE                  0x2000  /* DAC_SDMCLK_RATE */
  354. #define WM8400_DAC_SDMCLK_RATE_MASK             0x2000  /* DAC_SDMCLK_RATE */
  355. #define WM8400_DAC_SDMCLK_RATE_SHIFT                13  /* DAC_SDMCLK_RATE */
  356. #define WM8400_DAC_SDMCLK_RATE_WIDTH                 1  /* DAC_SDMCLK_RATE */
  357. #define WM8400_AIF_LRCLKRATE                    0x0400  /* AIF_LRCLKRATE */
  358. #define WM8400_AIF_LRCLKRATE_MASK               0x0400  /* AIF_LRCLKRATE */
  359. #define WM8400_AIF_LRCLKRATE_SHIFT                  10  /* AIF_LRCLKRATE */
  360. #define WM8400_AIF_LRCLKRATE_WIDTH                   1  /* AIF_LRCLKRATE */
  361. #define WM8400_DAC_MONO                         0x0200  /* DAC_MONO */
  362. #define WM8400_DAC_MONO_MASK                    0x0200  /* DAC_MONO */
  363. #define WM8400_DAC_MONO_SHIFT                        9  /* DAC_MONO */
  364. #define WM8400_DAC_MONO_WIDTH                        1  /* DAC_MONO */
  365. #define WM8400_DAC_SB_FILT                      0x0100  /* DAC_SB_FILT */
  366. #define WM8400_DAC_SB_FILT_MASK                 0x0100  /* DAC_SB_FILT */
  367. #define WM8400_DAC_SB_FILT_SHIFT                     8  /* DAC_SB_FILT */
  368. #define WM8400_DAC_SB_FILT_WIDTH                     1  /* DAC_SB_FILT */
  369. #define WM8400_DAC_MUTERATE                     0x0080  /* DAC_MUTERATE */
  370. #define WM8400_DAC_MUTERATE_MASK                0x0080  /* DAC_MUTERATE */
  371. #define WM8400_DAC_MUTERATE_SHIFT                    7  /* DAC_MUTERATE */
  372. #define WM8400_DAC_MUTERATE_WIDTH                    1  /* DAC_MUTERATE */
  373. #define WM8400_DAC_MUTEMODE                     0x0040  /* DAC_MUTEMODE */
  374. #define WM8400_DAC_MUTEMODE_MASK                0x0040  /* DAC_MUTEMODE */
  375. #define WM8400_DAC_MUTEMODE_SHIFT                    6  /* DAC_MUTEMODE */
  376. #define WM8400_DAC_MUTEMODE_WIDTH                    1  /* DAC_MUTEMODE */
  377. #define WM8400_DEEMP_MASK                       0x0030  /* DEEMP - [5:4] */
  378. #define WM8400_DEEMP_SHIFT                           4  /* DEEMP - [5:4] */
  379. #define WM8400_DEEMP_WIDTH                           2  /* DEEMP - [5:4] */
  380. #define WM8400_DAC_MUTE                         0x0004  /* DAC_MUTE */
  381. #define WM8400_DAC_MUTE_MASK                    0x0004  /* DAC_MUTE */
  382. #define WM8400_DAC_MUTE_SHIFT                        2  /* DAC_MUTE */
  383. #define WM8400_DAC_MUTE_WIDTH                        1  /* DAC_MUTE */
  384. #define WM8400_DACL_DATINV                      0x0002  /* DACL_DATINV */
  385. #define WM8400_DACL_DATINV_MASK                 0x0002  /* DACL_DATINV */
  386. #define WM8400_DACL_DATINV_SHIFT                     1  /* DACL_DATINV */
  387. #define WM8400_DACL_DATINV_WIDTH                     1  /* DACL_DATINV */
  388. #define WM8400_DACR_DATINV                      0x0001  /* DACR_DATINV */
  389. #define WM8400_DACR_DATINV_MASK                 0x0001  /* DACR_DATINV */
  390. #define WM8400_DACR_DATINV_SHIFT                     0  /* DACR_DATINV */
  391. #define WM8400_DACR_DATINV_WIDTH                     1  /* DACR_DATINV */
  392.  
  393. /*
  394.  * R12 (0x0C) - Left DAC Digital Volume
  395.  */
  396. #define WM8400_DAC_VU                           0x0100  /* DAC_VU */
  397. #define WM8400_DAC_VU_MASK                      0x0100  /* DAC_VU */
  398. #define WM8400_DAC_VU_SHIFT                          8  /* DAC_VU */
  399. #define WM8400_DAC_VU_WIDTH                          1  /* DAC_VU */
  400. #define WM8400_DACL_VOL_MASK                    0x00FF  /* DACL_VOL - [7:0] */
  401. #define WM8400_DACL_VOL_SHIFT                        0  /* DACL_VOL - [7:0] */
  402. #define WM8400_DACL_VOL_WIDTH                        8  /* DACL_VOL - [7:0] */
  403.  
  404. /*
  405.  * R13 (0x0D) - Right DAC Digital Volume
  406.  */
  407. #define WM8400_DAC_VU                           0x0100  /* DAC_VU */
  408. #define WM8400_DAC_VU_MASK                      0x0100  /* DAC_VU */
  409. #define WM8400_DAC_VU_SHIFT                          8  /* DAC_VU */
  410. #define WM8400_DAC_VU_WIDTH                          1  /* DAC_VU */
  411. #define WM8400_DACR_VOL_MASK                    0x00FF  /* DACR_VOL - [7:0] */
  412. #define WM8400_DACR_VOL_SHIFT                        0  /* DACR_VOL - [7:0] */
  413. #define WM8400_DACR_VOL_WIDTH                        8  /* DACR_VOL - [7:0] */
  414.  
  415. /*
  416.  * R14 (0x0E) - Digital Side Tone
  417.  */
  418. #define WM8400_ADCL_DAC_SVOL_MASK               0x1E00  /*   ADCL_DAC_SVOL - [12:9] */
  419. #define WM8400_ADCL_DAC_SVOL_SHIFT                   9  /*   ADCL_DAC_SVOL - [12:9] */
  420. #define WM8400_ADCL_DAC_SVOL_WIDTH                   4  /*   ADCL_DAC_SVOL - [12:9] */
  421. #define WM8400_ADCR_DAC_SVOL_MASK               0x01E0  /* ADCR_DAC_SVOL - [8:5] */
  422. #define WM8400_ADCR_DAC_SVOL_SHIFT                   5  /* ADCR_DAC_SVOL - [8:5] */
  423. #define WM8400_ADCR_DAC_SVOL_WIDTH                   4  /* ADCR_DAC_SVOL - [8:5] */
  424. #define WM8400_ADC_TO_DACL_MASK                 0x000C  /* ADC_TO_DACL - [3:2] */
  425. #define WM8400_ADC_TO_DACL_SHIFT                     2  /* ADC_TO_DACL - [3:2] */
  426. #define WM8400_ADC_TO_DACL_WIDTH                     2  /* ADC_TO_DACL - [3:2] */
  427. #define WM8400_ADC_TO_DACR_MASK                 0x0003  /* ADC_TO_DACR - [1:0] */
  428. #define WM8400_ADC_TO_DACR_SHIFT                     0  /* ADC_TO_DACR - [1:0] */
  429. #define WM8400_ADC_TO_DACR_WIDTH                     2  /* ADC_TO_DACR - [1:0] */
  430.  
  431. /*
  432.  * R15 (0x0F) - ADC CTRL
  433.  */
  434. #define WM8400_ADC_HPF_ENA                      0x0100  /* ADC_HPF_ENA */
  435. #define WM8400_ADC_HPF_ENA_MASK                 0x0100  /* ADC_HPF_ENA */
  436. #define WM8400_ADC_HPF_ENA_SHIFT                     8  /* ADC_HPF_ENA */
  437. #define WM8400_ADC_HPF_ENA_WIDTH                     1  /* ADC_HPF_ENA */
  438. #define WM8400_ADC_HPF_CUT_MASK                 0x0060  /* ADC_HPF_CUT - [6:5] */
  439. #define WM8400_ADC_HPF_CUT_SHIFT                     5  /* ADC_HPF_CUT - [6:5] */
  440. #define WM8400_ADC_HPF_CUT_WIDTH                     2  /* ADC_HPF_CUT - [6:5] */
  441. #define WM8400_ADCL_DATINV                      0x0002  /* ADCL_DATINV */
  442. #define WM8400_ADCL_DATINV_MASK                 0x0002  /* ADCL_DATINV */
  443. #define WM8400_ADCL_DATINV_SHIFT                     1  /* ADCL_DATINV */
  444. #define WM8400_ADCL_DATINV_WIDTH                     1  /* ADCL_DATINV */
  445. #define WM8400_ADCR_DATINV                      0x0001  /* ADCR_DATINV */
  446. #define WM8400_ADCR_DATINV_MASK                 0x0001  /* ADCR_DATINV */
  447. #define WM8400_ADCR_DATINV_SHIFT                     0  /* ADCR_DATINV */
  448. #define WM8400_ADCR_DATINV_WIDTH                     1  /* ADCR_DATINV */
  449.  
  450. /*
  451.  * R16 (0x10) - Left ADC Digital Volume
  452.  */
  453. #define WM8400_ADC_VU                           0x0100  /* ADC_VU */
  454. #define WM8400_ADC_VU_MASK                      0x0100  /* ADC_VU */
  455. #define WM8400_ADC_VU_SHIFT                          8  /* ADC_VU */
  456. #define WM8400_ADC_VU_WIDTH                          1  /* ADC_VU */
  457. #define WM8400_ADCL_VOL_MASK                    0x00FF  /* ADCL_VOL - [7:0] */
  458. #define WM8400_ADCL_VOL_SHIFT                        0  /* ADCL_VOL - [7:0] */
  459. #define WM8400_ADCL_VOL_WIDTH                        8  /* ADCL_VOL - [7:0] */
  460.  
  461. /*
  462.  * R17 (0x11) - Right ADC Digital Volume
  463.  */
  464. #define WM8400_ADC_VU                           0x0100  /* ADC_VU */
  465. #define WM8400_ADC_VU_MASK                      0x0100  /* ADC_VU */
  466. #define WM8400_ADC_VU_SHIFT                          8  /* ADC_VU */
  467. #define WM8400_ADC_VU_WIDTH                          1  /* ADC_VU */
  468. #define WM8400_ADCR_VOL_MASK                    0x00FF  /* ADCR_VOL - [7:0] */
  469. #define WM8400_ADCR_VOL_SHIFT                        0  /* ADCR_VOL - [7:0] */
  470. #define WM8400_ADCR_VOL_WIDTH                        8  /* ADCR_VOL - [7:0] */
  471.  
  472. /*
  473.  * R24 (0x18) - Left Line Input 1&2 Volume
  474.  */
  475. #define WM8400_IPVU                             0x0100  /* IPVU */
  476. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
  477. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
  478. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
  479. #define WM8400_LI12MUTE                         0x0080  /* LI12MUTE */
  480. #define WM8400_LI12MUTE_MASK                    0x0080  /* LI12MUTE */
  481. #define WM8400_LI12MUTE_SHIFT                        7  /* LI12MUTE */
  482. #define WM8400_LI12MUTE_WIDTH                        1  /* LI12MUTE */
  483. #define WM8400_LI12ZC                           0x0040  /* LI12ZC */
  484. #define WM8400_LI12ZC_MASK                      0x0040  /* LI12ZC */
  485. #define WM8400_LI12ZC_SHIFT                          6  /* LI12ZC */
  486. #define WM8400_LI12ZC_WIDTH                          1  /* LI12ZC */
  487. #define WM8400_LIN12VOL_MASK                    0x001F  /* LIN12VOL - [4:0] */
  488. #define WM8400_LIN12VOL_SHIFT                        0  /* LIN12VOL - [4:0] */
  489. #define WM8400_LIN12VOL_WIDTH                        5  /* LIN12VOL - [4:0] */
  490.  
  491. /*
  492.  * R25 (0x19) - Left Line Input 3&4 Volume
  493.  */
  494. #define WM8400_IPVU                             0x0100  /* IPVU */
  495. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
  496. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
  497. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
  498. #define WM8400_LI34MUTE                         0x0080  /* LI34MUTE */
  499. #define WM8400_LI34MUTE_MASK                    0x0080  /* LI34MUTE */
  500. #define WM8400_LI34MUTE_SHIFT                        7  /* LI34MUTE */
  501. #define WM8400_LI34MUTE_WIDTH                        1  /* LI34MUTE */
  502. #define WM8400_LI34ZC                           0x0040  /* LI34ZC */
  503. #define WM8400_LI34ZC_MASK                      0x0040  /* LI34ZC */
  504. #define WM8400_LI34ZC_SHIFT                          6  /* LI34ZC */
  505. #define WM8400_LI34ZC_WIDTH                          1  /* LI34ZC */
  506. #define WM8400_LIN34VOL_MASK                    0x001F  /* LIN34VOL - [4:0] */
  507. #define WM8400_LIN34VOL_SHIFT                        0  /* LIN34VOL - [4:0] */
  508. #define WM8400_LIN34VOL_WIDTH                        5  /* LIN34VOL - [4:0] */
  509.  
  510. /*
  511.  * R26 (0x1A) - Right Line Input 1&2 Volume
  512.  */
  513. #define WM8400_IPVU                             0x0100  /* IPVU */
  514. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
  515. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
  516. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
  517. #define WM8400_RI12MUTE                         0x0080  /* RI12MUTE */
  518. #define WM8400_RI12MUTE_MASK                    0x0080  /* RI12MUTE */
  519. #define WM8400_RI12MUTE_SHIFT                        7  /* RI12MUTE */
  520. #define WM8400_RI12MUTE_WIDTH                        1  /* RI12MUTE */
  521. #define WM8400_RI12ZC                           0x0040  /* RI12ZC */
  522. #define WM8400_RI12ZC_MASK                      0x0040  /* RI12ZC */
  523. #define WM8400_RI12ZC_SHIFT                          6  /* RI12ZC */
  524. #define WM8400_RI12ZC_WIDTH                          1  /* RI12ZC */
  525. #define WM8400_RIN12VOL_MASK                    0x001F  /* RIN12VOL - [4:0] */
  526. #define WM8400_RIN12VOL_SHIFT                        0  /* RIN12VOL - [4:0] */
  527. #define WM8400_RIN12VOL_WIDTH                        5  /* RIN12VOL - [4:0] */
  528.  
  529. /*
  530.  * R27 (0x1B) - Right Line Input 3&4 Volume
  531.  */
  532. #define WM8400_IPVU                             0x0100  /* IPVU */
  533. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
  534. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
  535. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
  536. #define WM8400_RI34MUTE                         0x0080  /* RI34MUTE */
  537. #define WM8400_RI34MUTE_MASK                    0x0080  /* RI34MUTE */
  538. #define WM8400_RI34MUTE_SHIFT                        7  /* RI34MUTE */
  539. #define WM8400_RI34MUTE_WIDTH                        1  /* RI34MUTE */
  540. #define WM8400_RI34ZC                           0x0040  /* RI34ZC */
  541. #define WM8400_RI34ZC_MASK                      0x0040  /* RI34ZC */
  542. #define WM8400_RI34ZC_SHIFT                          6  /* RI34ZC */
  543. #define WM8400_RI34ZC_WIDTH                          1  /* RI34ZC */
  544. #define WM8400_RIN34VOL_MASK                    0x001F  /* RIN34VOL - [4:0] */
  545. #define WM8400_RIN34VOL_SHIFT                        0  /* RIN34VOL - [4:0] */
  546. #define WM8400_RIN34VOL_WIDTH                        5  /* RIN34VOL - [4:0] */
  547.  
  548. /*
  549.  * R28 (0x1C) - Left Output Volume
  550.  */
  551. #define WM8400_OPVU                             0x0100  /* OPVU */
  552. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
  553. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
  554. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
  555. #define WM8400_LOZC                             0x0080  /* LOZC */
  556. #define WM8400_LOZC_MASK                        0x0080  /* LOZC */
  557. #define WM8400_LOZC_SHIFT                            7  /* LOZC */
  558. #define WM8400_LOZC_WIDTH                            1  /* LOZC */
  559. #define WM8400_LOUTVOL_MASK                     0x007F  /* LOUTVOL - [6:0] */
  560. #define WM8400_LOUTVOL_SHIFT                         0  /* LOUTVOL - [6:0] */
  561. #define WM8400_LOUTVOL_WIDTH                         7  /* LOUTVOL - [6:0] */
  562.  
  563. /*
  564.  * R29 (0x1D) - Right Output Volume
  565.  */
  566. #define WM8400_OPVU                             0x0100  /* OPVU */
  567. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
  568. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
  569. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
  570. #define WM8400_ROZC                             0x0080  /* ROZC */
  571. #define WM8400_ROZC_MASK                        0x0080  /* ROZC */
  572. #define WM8400_ROZC_SHIFT                            7  /* ROZC */
  573. #define WM8400_ROZC_WIDTH                            1  /* ROZC */
  574. #define WM8400_ROUTVOL_MASK                     0x007F  /* ROUTVOL - [6:0] */
  575. #define WM8400_ROUTVOL_SHIFT                         0  /* ROUTVOL - [6:0] */
  576. #define WM8400_ROUTVOL_WIDTH                         7  /* ROUTVOL - [6:0] */
  577.  
  578. /*
  579.  * R30 (0x1E) - Line Outputs Volume
  580.  */
  581. #define WM8400_LONMUTE                          0x0040  /* LONMUTE */
  582. #define WM8400_LONMUTE_MASK                     0x0040  /* LONMUTE */
  583. #define WM8400_LONMUTE_SHIFT                         6  /* LONMUTE */
  584. #define WM8400_LONMUTE_WIDTH                         1  /* LONMUTE */
  585. #define WM8400_LOPMUTE                          0x0020  /* LOPMUTE */
  586. #define WM8400_LOPMUTE_MASK                     0x0020  /* LOPMUTE */
  587. #define WM8400_LOPMUTE_SHIFT                         5  /* LOPMUTE */
  588. #define WM8400_LOPMUTE_WIDTH                         1  /* LOPMUTE */
  589. #define WM8400_LOATTN                           0x0010  /* LOATTN */
  590. #define WM8400_LOATTN_MASK                      0x0010  /* LOATTN */
  591. #define WM8400_LOATTN_SHIFT                          4  /* LOATTN */
  592. #define WM8400_LOATTN_WIDTH                          1  /* LOATTN */
  593. #define WM8400_RONMUTE                          0x0004  /* RONMUTE */
  594. #define WM8400_RONMUTE_MASK                     0x0004  /* RONMUTE */
  595. #define WM8400_RONMUTE_SHIFT                         2  /* RONMUTE */
  596. #define WM8400_RONMUTE_WIDTH                         1  /* RONMUTE */
  597. #define WM8400_ROPMUTE                          0x0002  /* ROPMUTE */
  598. #define WM8400_ROPMUTE_MASK                     0x0002  /* ROPMUTE */
  599. #define WM8400_ROPMUTE_SHIFT                         1  /* ROPMUTE */
  600. #define WM8400_ROPMUTE_WIDTH                         1  /* ROPMUTE */
  601. #define WM8400_ROATTN                           0x0001  /* ROATTN */
  602. #define WM8400_ROATTN_MASK                      0x0001  /* ROATTN */
  603. #define WM8400_ROATTN_SHIFT                          0  /* ROATTN */
  604. #define WM8400_ROATTN_WIDTH                          1  /* ROATTN */
  605.  
  606. /*
  607.  * R31 (0x1F) - Out3/4 Volume
  608.  */
  609. #define WM8400_OUT3MUTE                         0x0020  /* OUT3MUTE */
  610. #define WM8400_OUT3MUTE_MASK                    0x0020  /* OUT3MUTE */
  611. #define WM8400_OUT3MUTE_SHIFT                        5  /* OUT3MUTE */
  612. #define WM8400_OUT3MUTE_WIDTH                        1  /* OUT3MUTE */
  613. #define WM8400_OUT3ATTN                         0x0010  /* OUT3ATTN */
  614. #define WM8400_OUT3ATTN_MASK                    0x0010  /* OUT3ATTN */
  615. #define WM8400_OUT3ATTN_SHIFT                        4  /* OUT3ATTN */
  616. #define WM8400_OUT3ATTN_WIDTH                        1  /* OUT3ATTN */
  617. #define WM8400_OUT4MUTE                         0x0002  /* OUT4MUTE */
  618. #define WM8400_OUT4MUTE_MASK                    0x0002  /* OUT4MUTE */
  619. #define WM8400_OUT4MUTE_SHIFT                        1  /* OUT4MUTE */
  620. #define WM8400_OUT4MUTE_WIDTH                        1  /* OUT4MUTE */
  621. #define WM8400_OUT4ATTN                         0x0001  /* OUT4ATTN */
  622. #define WM8400_OUT4ATTN_MASK                    0x0001  /* OUT4ATTN */
  623. #define WM8400_OUT4ATTN_SHIFT                        0  /* OUT4ATTN */
  624. #define WM8400_OUT4ATTN_WIDTH                        1  /* OUT4ATTN */
  625.  
  626. /*
  627.  * R32 (0x20) - Left OPGA Volume
  628.  */
  629. #define WM8400_OPVU                             0x0100  /* OPVU */
  630. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
  631. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
  632. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
  633. #define WM8400_LOPGAZC                          0x0080  /* LOPGAZC */
  634. #define WM8400_LOPGAZC_MASK                     0x0080  /* LOPGAZC */
  635. #define WM8400_LOPGAZC_SHIFT                         7  /* LOPGAZC */
  636. #define WM8400_LOPGAZC_WIDTH                         1  /* LOPGAZC */
  637. #define WM8400_LOPGAVOL_MASK                    0x007F  /* LOPGAVOL - [6:0] */
  638. #define WM8400_LOPGAVOL_SHIFT                        0  /* LOPGAVOL - [6:0] */
  639. #define WM8400_LOPGAVOL_WIDTH                        7  /* LOPGAVOL - [6:0] */
  640.  
  641. /*
  642.  * R33 (0x21) - Right OPGA Volume
  643.  */
  644. #define WM8400_OPVU                             0x0100  /* OPVU */
  645. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
  646. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
  647. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
  648. #define WM8400_ROPGAZC                          0x0080  /* ROPGAZC */
  649. #define WM8400_ROPGAZC_MASK                     0x0080  /* ROPGAZC */
  650. #define WM8400_ROPGAZC_SHIFT                         7  /* ROPGAZC */
  651. #define WM8400_ROPGAZC_WIDTH                         1  /* ROPGAZC */
  652. #define WM8400_ROPGAVOL_MASK                    0x007F  /* ROPGAVOL - [6:0] */
  653. #define WM8400_ROPGAVOL_SHIFT                        0  /* ROPGAVOL - [6:0] */
  654. #define WM8400_ROPGAVOL_WIDTH                        7  /* ROPGAVOL - [6:0] */
  655.  
  656. /*
  657.  * R34 (0x22) - Speaker Volume
  658.  */
  659. #define WM8400_SPKATTN_MASK                     0x0003  /* SPKATTN - [1:0] */
  660. #define WM8400_SPKATTN_SHIFT                         0  /* SPKATTN - [1:0] */
  661. #define WM8400_SPKATTN_WIDTH                         2  /* SPKATTN - [1:0] */
  662.  
  663. /*
  664.  * R35 (0x23) - ClassD1
  665.  */
  666. #define WM8400_CDMODE                           0x0100  /* CDMODE */
  667. #define WM8400_CDMODE_MASK                      0x0100  /* CDMODE */
  668. #define WM8400_CDMODE_SHIFT                          8  /* CDMODE */
  669. #define WM8400_CDMODE_WIDTH                          1  /* CDMODE */
  670. #define WM8400_CLASSD_CLK_SEL                   0x0080  /* CLASSD_CLK_SEL */
  671. #define WM8400_CLASSD_CLK_SEL_MASK              0x0080  /* CLASSD_CLK_SEL */
  672. #define WM8400_CLASSD_CLK_SEL_SHIFT                  7  /* CLASSD_CLK_SEL */
  673. #define WM8400_CLASSD_CLK_SEL_WIDTH                  1  /* CLASSD_CLK_SEL */
  674. #define WM8400_CD_SRCTRL                        0x0040  /* CD_SRCTRL */
  675. #define WM8400_CD_SRCTRL_MASK                   0x0040  /* CD_SRCTRL */
  676. #define WM8400_CD_SRCTRL_SHIFT                       6  /* CD_SRCTRL */
  677. #define WM8400_CD_SRCTRL_WIDTH                       1  /* CD_SRCTRL */
  678. #define WM8400_SPKNOPOP                         0x0020  /* SPKNOPOP */
  679. #define WM8400_SPKNOPOP_MASK                    0x0020  /* SPKNOPOP */
  680. #define WM8400_SPKNOPOP_SHIFT                        5  /* SPKNOPOP */
  681. #define WM8400_SPKNOPOP_WIDTH                        1  /* SPKNOPOP */
  682. #define WM8400_DBLERATE                         0x0010  /* DBLERATE */
  683. #define WM8400_DBLERATE_MASK                    0x0010  /* DBLERATE */
  684. #define WM8400_DBLERATE_SHIFT                        4  /* DBLERATE */
  685. #define WM8400_DBLERATE_WIDTH                        1  /* DBLERATE */
  686. #define WM8400_LOOPTEST                         0x0008  /* LOOPTEST */
  687. #define WM8400_LOOPTEST_MASK                    0x0008  /* LOOPTEST */
  688. #define WM8400_LOOPTEST_SHIFT                        3  /* LOOPTEST */
  689. #define WM8400_LOOPTEST_WIDTH                        1  /* LOOPTEST */
  690. #define WM8400_HALFABBIAS                       0x0004  /* HALFABBIAS */
  691. #define WM8400_HALFABBIAS_MASK                  0x0004  /* HALFABBIAS */
  692. #define WM8400_HALFABBIAS_SHIFT                      2  /* HALFABBIAS */
  693. #define WM8400_HALFABBIAS_WIDTH                      1  /* HALFABBIAS */
  694. #define WM8400_TRIDEL_MASK                      0x0003  /* TRIDEL - [1:0] */
  695. #define WM8400_TRIDEL_SHIFT                          0  /* TRIDEL - [1:0] */
  696. #define WM8400_TRIDEL_WIDTH                          2  /* TRIDEL - [1:0] */
  697.  
  698. /*
  699.  * R37 (0x25) - ClassD3
  700.  */
  701. #define WM8400_DCGAIN_MASK                      0x0038  /* DCGAIN - [5:3] */
  702. #define WM8400_DCGAIN_SHIFT                          3  /* DCGAIN - [5:3] */
  703. #define WM8400_DCGAIN_WIDTH                          3  /* DCGAIN - [5:3] */
  704. #define WM8400_ACGAIN_MASK                      0x0007  /* ACGAIN - [2:0] */
  705. #define WM8400_ACGAIN_SHIFT                          0  /* ACGAIN - [2:0] */
  706. #define WM8400_ACGAIN_WIDTH                          3  /* ACGAIN - [2:0] */
  707.  
  708. /*
  709.  * R39 (0x27) - Input Mixer1
  710.  */
  711. #define WM8400_AINLMODE_MASK                    0x000C  /* AINLMODE - [3:2] */
  712. #define WM8400_AINLMODE_SHIFT                        2  /* AINLMODE - [3:2] */
  713. #define WM8400_AINLMODE_WIDTH                        2  /* AINLMODE - [3:2] */
  714. #define WM8400_AINRMODE_MASK                    0x0003  /* AINRMODE - [1:0] */
  715. #define WM8400_AINRMODE_SHIFT                        0  /* AINRMODE - [1:0] */
  716. #define WM8400_AINRMODE_WIDTH                        2  /* AINRMODE - [1:0] */
  717.  
  718. /*
  719.  * R40 (0x28) - Input Mixer2
  720.  */
  721. #define WM8400_LMP4                             0x0080  /* LMP4 */
  722. #define WM8400_LMP4_MASK                        0x0080  /* LMP4 */
  723. #define WM8400_LMP4_SHIFT                            7  /* LMP4 */
  724. #define WM8400_LMP4_WIDTH                            1  /* LMP4 */
  725. #define WM8400_LMN3                             0x0040  /* LMN3 */
  726. #define WM8400_LMN3_MASK                        0x0040  /* LMN3 */
  727. #define WM8400_LMN3_SHIFT                            6  /* LMN3 */
  728. #define WM8400_LMN3_WIDTH                            1  /* LMN3 */
  729. #define WM8400_LMP2                             0x0020  /* LMP2 */
  730. #define WM8400_LMP2_MASK                        0x0020  /* LMP2 */
  731. #define WM8400_LMP2_SHIFT                            5  /* LMP2 */
  732. #define WM8400_LMP2_WIDTH                            1  /* LMP2 */
  733. #define WM8400_LMN1                             0x0010  /* LMN1 */
  734. #define WM8400_LMN1_MASK                        0x0010  /* LMN1 */
  735. #define WM8400_LMN1_SHIFT                            4  /* LMN1 */
  736. #define WM8400_LMN1_WIDTH                            1  /* LMN1 */
  737. #define WM8400_RMP4                             0x0008  /* RMP4 */
  738. #define WM8400_RMP4_MASK                        0x0008  /* RMP4 */
  739. #define WM8400_RMP4_SHIFT                            3  /* RMP4 */
  740. #define WM8400_RMP4_WIDTH                            1  /* RMP4 */
  741. #define WM8400_RMN3                             0x0004  /* RMN3 */
  742. #define WM8400_RMN3_MASK                        0x0004  /* RMN3 */
  743. #define WM8400_RMN3_SHIFT                            2  /* RMN3 */
  744. #define WM8400_RMN3_WIDTH                            1  /* RMN3 */
  745. #define WM8400_RMP2                             0x0002  /* RMP2 */
  746. #define WM8400_RMP2_MASK                        0x0002  /* RMP2 */
  747. #define WM8400_RMP2_SHIFT                            1  /* RMP2 */
  748. #define WM8400_RMP2_WIDTH                            1  /* RMP2 */
  749. #define WM8400_RMN1                             0x0001  /* RMN1 */
  750. #define WM8400_RMN1_MASK                        0x0001  /* RMN1 */
  751. #define WM8400_RMN1_SHIFT                            0  /* RMN1 */
  752. #define WM8400_RMN1_WIDTH                            1  /* RMN1 */
  753.  
  754. /*
  755.  * R41 (0x29) - Input Mixer3
  756.  */
  757. #define WM8400_L34MNB                           0x0100  /* L34MNB */
  758. #define WM8400_L34MNB_MASK                      0x0100  /* L34MNB */
  759. #define WM8400_L34MNB_SHIFT                          8  /* L34MNB */
  760. #define WM8400_L34MNB_WIDTH                          1  /* L34MNB */
  761. #define WM8400_L34MNBST                         0x0080  /* L34MNBST */
  762. #define WM8400_L34MNBST_MASK                    0x0080  /* L34MNBST */
  763. #define WM8400_L34MNBST_SHIFT                        7  /* L34MNBST */
  764. #define WM8400_L34MNBST_WIDTH                        1  /* L34MNBST */
  765. #define WM8400_L12MNB                           0x0020  /* L12MNB */
  766. #define WM8400_L12MNB_MASK                      0x0020  /* L12MNB */
  767. #define WM8400_L12MNB_SHIFT                          5  /* L12MNB */
  768. #define WM8400_L12MNB_WIDTH                          1  /* L12MNB */
  769. #define WM8400_L12MNBST                         0x0010  /* L12MNBST */
  770. #define WM8400_L12MNBST_MASK                    0x0010  /* L12MNBST */
  771. #define WM8400_L12MNBST_SHIFT                        4  /* L12MNBST */
  772. #define WM8400_L12MNBST_WIDTH                        1  /* L12MNBST */
  773. #define WM8400_LDBVOL_MASK                      0x0007  /* LDBVOL - [2:0] */
  774. #define WM8400_LDBVOL_SHIFT                          0  /* LDBVOL - [2:0] */
  775. #define WM8400_LDBVOL_WIDTH                          3  /* LDBVOL - [2:0] */
  776.  
  777. /*
  778.  * R42 (0x2A) - Input Mixer4
  779.  */
  780. #define WM8400_R34MNB                           0x0100  /* R34MNB */
  781. #define WM8400_R34MNB_MASK                      0x0100  /* R34MNB */
  782. #define WM8400_R34MNB_SHIFT                          8  /* R34MNB */
  783. #define WM8400_R34MNB_WIDTH                          1  /* R34MNB */
  784. #define WM8400_R34MNBST                         0x0080  /* R34MNBST */
  785. #define WM8400_R34MNBST_MASK                    0x0080  /* R34MNBST */
  786. #define WM8400_R34MNBST_SHIFT                        7  /* R34MNBST */
  787. #define WM8400_R34MNBST_WIDTH                        1  /* R34MNBST */
  788. #define WM8400_R12MNB                           0x0020  /* R12MNB */
  789. #define WM8400_R12MNB_MASK                      0x0020  /* R12MNB */
  790. #define WM8400_R12MNB_SHIFT                          5  /* R12MNB */
  791. #define WM8400_R12MNB_WIDTH                          1  /* R12MNB */
  792. #define WM8400_R12MNBST                         0x0010  /* R12MNBST */
  793. #define WM8400_R12MNBST_MASK                    0x0010  /* R12MNBST */
  794. #define WM8400_R12MNBST_SHIFT                        4  /* R12MNBST */
  795. #define WM8400_R12MNBST_WIDTH                        1  /* R12MNBST */
  796. #define WM8400_RDBVOL_MASK                      0x0007  /* RDBVOL - [2:0] */
  797. #define WM8400_RDBVOL_SHIFT                          0  /* RDBVOL - [2:0] */
  798. #define WM8400_RDBVOL_WIDTH                          3  /* RDBVOL - [2:0] */
  799.  
  800. /*
  801.  * R43 (0x2B) - Input Mixer5
  802.  */
  803. #define WM8400_LI2BVOL_MASK                     0x01C0  /* LI2BVOL - [8:6] */
  804. #define WM8400_LI2BVOL_SHIFT                         6  /* LI2BVOL - [8:6] */
  805. #define WM8400_LI2BVOL_WIDTH                         3  /* LI2BVOL - [8:6] */
  806. #define WM8400_LR4BVOL_MASK                     0x0038  /* LR4BVOL - [5:3] */
  807. #define WM8400_LR4BVOL_SHIFT                         3  /* LR4BVOL - [5:3] */
  808. #define WM8400_LR4BVOL_WIDTH                         3  /* LR4BVOL - [5:3] */
  809. #define WM8400_LL4BVOL_MASK                     0x0007  /* LL4BVOL - [2:0] */
  810. #define WM8400_LL4BVOL_SHIFT                         0  /* LL4BVOL - [2:0] */
  811. #define WM8400_LL4BVOL_WIDTH                         3  /* LL4BVOL - [2:0] */
  812.  
  813. /*
  814.  * R44 (0x2C) - Input Mixer6
  815.  */
  816. #define WM8400_RI2BVOL_MASK                     0x01C0  /* RI2BVOL - [8:6] */
  817. #define WM8400_RI2BVOL_SHIFT                         6  /* RI2BVOL - [8:6] */
  818. #define WM8400_RI2BVOL_WIDTH                         3  /* RI2BVOL - [8:6] */
  819. #define WM8400_RL4BVOL_MASK                     0x0038  /* RL4BVOL - [5:3] */
  820. #define WM8400_RL4BVOL_SHIFT                         3  /* RL4BVOL - [5:3] */
  821. #define WM8400_RL4BVOL_WIDTH                         3  /* RL4BVOL - [5:3] */
  822. #define WM8400_RR4BVOL_MASK                     0x0007  /* RR4BVOL - [2:0] */
  823. #define WM8400_RR4BVOL_SHIFT                         0  /* RR4BVOL - [2:0] */
  824. #define WM8400_RR4BVOL_WIDTH                         3  /* RR4BVOL - [2:0] */
  825.  
  826. /*
  827.  * R45 (0x2D) - Output Mixer1
  828.  */
  829. #define WM8400_LRBLO                            0x0080  /* LRBLO */
  830. #define WM8400_LRBLO_MASK                       0x0080  /* LRBLO */
  831. #define WM8400_LRBLO_SHIFT                           7  /* LRBLO */
  832. #define WM8400_LRBLO_WIDTH                           1  /* LRBLO */
  833. #define WM8400_LLBLO                            0x0040  /* LLBLO */
  834. #define WM8400_LLBLO_MASK                       0x0040  /* LLBLO */
  835. #define WM8400_LLBLO_SHIFT                           6  /* LLBLO */
  836. #define WM8400_LLBLO_WIDTH                           1  /* LLBLO */
  837. #define WM8400_LRI3LO                           0x0020  /* LRI3LO */
  838. #define WM8400_LRI3LO_MASK                      0x0020  /* LRI3LO */
  839. #define WM8400_LRI3LO_SHIFT                          5  /* LRI3LO */
  840. #define WM8400_LRI3LO_WIDTH                          1  /* LRI3LO */
  841. #define WM8400_LLI3LO                           0x0010  /* LLI3LO */
  842. #define WM8400_LLI3LO_MASK                      0x0010  /* LLI3LO */
  843. #define WM8400_LLI3LO_SHIFT                          4  /* LLI3LO */
  844. #define WM8400_LLI3LO_WIDTH                          1  /* LLI3LO */
  845. #define WM8400_LR12LO                           0x0008  /* LR12LO */
  846. #define WM8400_LR12LO_MASK                      0x0008  /* LR12LO */
  847. #define WM8400_LR12LO_SHIFT                          3  /* LR12LO */
  848. #define WM8400_LR12LO_WIDTH                          1  /* LR12LO */
  849. #define WM8400_LL12LO                           0x0004  /* LL12LO */
  850. #define WM8400_LL12LO_MASK                      0x0004  /* LL12LO */
  851. #define WM8400_LL12LO_SHIFT                          2  /* LL12LO */
  852. #define WM8400_LL12LO_WIDTH                          1  /* LL12LO */
  853. #define WM8400_LDLO                             0x0001  /* LDLO */
  854. #define WM8400_LDLO_MASK                        0x0001  /* LDLO */
  855. #define WM8400_LDLO_SHIFT                            0  /* LDLO */
  856. #define WM8400_LDLO_WIDTH                            1  /* LDLO */
  857.  
  858. /*
  859.  * R46 (0x2E) - Output Mixer2
  860.  */
  861. #define WM8400_RLBRO                            0x0080  /* RLBRO */
  862. #define WM8400_RLBRO_MASK                       0x0080  /* RLBRO */
  863. #define WM8400_RLBRO_SHIFT                           7  /* RLBRO */
  864. #define WM8400_RLBRO_WIDTH                           1  /* RLBRO */
  865. #define WM8400_RRBRO                            0x0040  /* RRBRO */
  866. #define WM8400_RRBRO_MASK                       0x0040  /* RRBRO */
  867. #define WM8400_RRBRO_SHIFT                           6  /* RRBRO */
  868. #define WM8400_RRBRO_WIDTH                           1  /* RRBRO */
  869. #define WM8400_RLI3RO                           0x0020  /* RLI3RO */
  870. #define WM8400_RLI3RO_MASK                      0x0020  /* RLI3RO */
  871. #define WM8400_RLI3RO_SHIFT                          5  /* RLI3RO */
  872. #define WM8400_RLI3RO_WIDTH                          1  /* RLI3RO */
  873. #define WM8400_RRI3RO                           0x0010  /* RRI3RO */
  874. #define WM8400_RRI3RO_MASK                      0x0010  /* RRI3RO */
  875. #define WM8400_RRI3RO_SHIFT                          4  /* RRI3RO */
  876. #define WM8400_RRI3RO_WIDTH                          1  /* RRI3RO */
  877. #define WM8400_RL12RO                           0x0008  /* RL12RO */
  878. #define WM8400_RL12RO_MASK                      0x0008  /* RL12RO */
  879. #define WM8400_RL12RO_SHIFT                          3  /* RL12RO */
  880. #define WM8400_RL12RO_WIDTH                          1  /* RL12RO */
  881. #define WM8400_RR12RO                           0x0004  /* RR12RO */
  882. #define WM8400_RR12RO_MASK                      0x0004  /* RR12RO */
  883. #define WM8400_RR12RO_SHIFT                          2  /* RR12RO */
  884. #define WM8400_RR12RO_WIDTH                          1  /* RR12RO */
  885. #define WM8400_RDRO                             0x0001  /* RDRO */
  886. #define WM8400_RDRO_MASK                        0x0001  /* RDRO */
  887. #define WM8400_RDRO_SHIFT                            0  /* RDRO */
  888. #define WM8400_RDRO_WIDTH                            1  /* RDRO */
  889.  
  890. /*
  891.  * R47 (0x2F) - Output Mixer3
  892.  */
  893. #define WM8400_LLI3LOVOL_MASK                   0x01C0  /* LLI3LOVOL - [8:6] */
  894. #define WM8400_LLI3LOVOL_SHIFT                       6  /* LLI3LOVOL - [8:6] */
  895. #define WM8400_LLI3LOVOL_WIDTH                       3  /* LLI3LOVOL - [8:6] */
  896. #define WM8400_LR12LOVOL_MASK                   0x0038  /* LR12LOVOL - [5:3] */
  897. #define WM8400_LR12LOVOL_SHIFT                       3  /* LR12LOVOL - [5:3] */
  898. #define WM8400_LR12LOVOL_WIDTH                       3  /* LR12LOVOL - [5:3] */
  899. #define WM8400_LL12LOVOL_MASK                   0x0007  /* LL12LOVOL - [2:0] */
  900. #define WM8400_LL12LOVOL_SHIFT                       0  /* LL12LOVOL - [2:0] */
  901. #define WM8400_LL12LOVOL_WIDTH                       3  /* LL12LOVOL - [2:0] */
  902.  
  903. /*
  904.  * R48 (0x30) - Output Mixer4
  905.  */
  906. #define WM8400_RRI3ROVOL_MASK                   0x01C0  /* RRI3ROVOL - [8:6] */
  907. #define WM8400_RRI3ROVOL_SHIFT                       6  /* RRI3ROVOL - [8:6] */
  908. #define WM8400_RRI3ROVOL_WIDTH                       3  /* RRI3ROVOL - [8:6] */
  909. #define WM8400_RL12ROVOL_MASK                   0x0038  /* RL12ROVOL - [5:3] */
  910. #define WM8400_RL12ROVOL_SHIFT                       3  /* RL12ROVOL - [5:3] */
  911. #define WM8400_RL12ROVOL_WIDTH                       3  /* RL12ROVOL - [5:3] */
  912. #define WM8400_RR12ROVOL_MASK                   0x0007  /* RR12ROVOL - [2:0] */
  913. #define WM8400_RR12ROVOL_SHIFT                       0  /* RR12ROVOL - [2:0] */
  914. #define WM8400_RR12ROVOL_WIDTH                       3  /* RR12ROVOL - [2:0] */
  915.  
  916. /*
  917.  * R49 (0x31) - Output Mixer5
  918.  */
  919. #define WM8400_LRI3LOVOL_MASK                   0x01C0  /* LRI3LOVOL - [8:6] */
  920. #define WM8400_LRI3LOVOL_SHIFT                       6  /* LRI3LOVOL - [8:6] */
  921. #define WM8400_LRI3LOVOL_WIDTH                       3  /* LRI3LOVOL - [8:6] */
  922. #define WM8400_LRBLOVOL_MASK                    0x0038  /* LRBLOVOL - [5:3] */
  923. #define WM8400_LRBLOVOL_SHIFT                        3  /* LRBLOVOL - [5:3] */
  924. #define WM8400_LRBLOVOL_WIDTH                        3  /* LRBLOVOL - [5:3] */
  925. #define WM8400_LLBLOVOL_MASK                    0x0007  /* LLBLOVOL - [2:0] */
  926. #define WM8400_LLBLOVOL_SHIFT                        0  /* LLBLOVOL - [2:0] */
  927. #define WM8400_LLBLOVOL_WIDTH                        3  /* LLBLOVOL - [2:0] */
  928.  
  929. /*
  930.  * R50 (0x32) - Output Mixer6
  931.  */
  932. #define WM8400_RLI3ROVOL_MASK                   0x01C0  /* RLI3ROVOL - [8:6] */
  933. #define WM8400_RLI3ROVOL_SHIFT                       6  /* RLI3ROVOL - [8:6] */
  934. #define WM8400_RLI3ROVOL_WIDTH                       3  /* RLI3ROVOL - [8:6] */
  935. #define WM8400_RLBROVOL_MASK                    0x0038  /* RLBROVOL - [5:3] */
  936. #define WM8400_RLBROVOL_SHIFT                        3  /* RLBROVOL - [5:3] */
  937. #define WM8400_RLBROVOL_WIDTH                        3  /* RLBROVOL - [5:3] */
  938. #define WM8400_RRBROVOL_MASK                    0x0007  /* RRBROVOL - [2:0] */
  939. #define WM8400_RRBROVOL_SHIFT                        0  /* RRBROVOL - [2:0] */
  940. #define WM8400_RRBROVOL_WIDTH                        3  /* RRBROVOL - [2:0] */
  941.  
  942. /*
  943.  * R51 (0x33) - Out3/4 Mixer
  944.  */
  945. #define WM8400_VSEL_MASK                        0x0180  /* VSEL - [8:7] */
  946. #define WM8400_VSEL_SHIFT                            7  /* VSEL - [8:7] */
  947. #define WM8400_VSEL_WIDTH                            2  /* VSEL - [8:7] */
  948. #define WM8400_LI4O3                            0x0020  /* LI4O3 */
  949. #define WM8400_LI4O3_MASK                       0x0020  /* LI4O3 */
  950. #define WM8400_LI4O3_SHIFT                           5  /* LI4O3 */
  951. #define WM8400_LI4O3_WIDTH                           1  /* LI4O3 */
  952. #define WM8400_LPGAO3                           0x0010  /* LPGAO3 */
  953. #define WM8400_LPGAO3_MASK                      0x0010  /* LPGAO3 */
  954. #define WM8400_LPGAO3_SHIFT                          4  /* LPGAO3 */
  955. #define WM8400_LPGAO3_WIDTH                          1  /* LPGAO3 */
  956. #define WM8400_RI4O4                            0x0002  /* RI4O4 */
  957. #define WM8400_RI4O4_MASK                       0x0002  /* RI4O4 */
  958. #define WM8400_RI4O4_SHIFT                           1  /* RI4O4 */
  959. #define WM8400_RI4O4_WIDTH                           1  /* RI4O4 */
  960. #define WM8400_RPGAO4                           0x0001  /* RPGAO4 */
  961. #define WM8400_RPGAO4_MASK                      0x0001  /* RPGAO4 */
  962. #define WM8400_RPGAO4_SHIFT                          0  /* RPGAO4 */
  963. #define WM8400_RPGAO4_WIDTH                          1  /* RPGAO4 */
  964.  
  965. /*
  966.  * R52 (0x34) - Line Mixer1
  967.  */
  968. #define WM8400_LLOPGALON                        0x0040  /* LLOPGALON */
  969. #define WM8400_LLOPGALON_MASK                   0x0040  /* LLOPGALON */
  970. #define WM8400_LLOPGALON_SHIFT                       6  /* LLOPGALON */
  971. #define WM8400_LLOPGALON_WIDTH                       1  /* LLOPGALON */
  972. #define WM8400_LROPGALON                        0x0020  /* LROPGALON */
  973. #define WM8400_LROPGALON_MASK                   0x0020  /* LROPGALON */
  974. #define WM8400_LROPGALON_SHIFT                       5  /* LROPGALON */
  975. #define WM8400_LROPGALON_WIDTH                       1  /* LROPGALON */
  976. #define WM8400_LOPLON                           0x0010  /* LOPLON */
  977. #define WM8400_LOPLON_MASK                      0x0010  /* LOPLON */
  978. #define WM8400_LOPLON_SHIFT                          4  /* LOPLON */
  979. #define WM8400_LOPLON_WIDTH                          1  /* LOPLON */
  980. #define WM8400_LR12LOP                          0x0004  /* LR12LOP */
  981. #define WM8400_LR12LOP_MASK                     0x0004  /* LR12LOP */
  982. #define WM8400_LR12LOP_SHIFT                         2  /* LR12LOP */
  983. #define WM8400_LR12LOP_WIDTH                         1  /* LR12LOP */
  984. #define WM8400_LL12LOP                          0x0002  /* LL12LOP */
  985. #define WM8400_LL12LOP_MASK                     0x0002  /* LL12LOP */
  986. #define WM8400_LL12LOP_SHIFT                         1  /* LL12LOP */
  987. #define WM8400_LL12LOP_WIDTH                         1  /* LL12LOP */
  988. #define WM8400_LLOPGALOP                        0x0001  /* LLOPGALOP */
  989. #define WM8400_LLOPGALOP_MASK                   0x0001  /* LLOPGALOP */
  990. #define WM8400_LLOPGALOP_SHIFT                       0  /* LLOPGALOP */
  991. #define WM8400_LLOPGALOP_WIDTH                       1  /* LLOPGALOP */
  992.  
  993. /*
  994.  * R53 (0x35) - Line Mixer2
  995.  */
  996. #define WM8400_RROPGARON                        0x0040  /* RROPGARON */
  997. #define WM8400_RROPGARON_MASK                   0x0040  /* RROPGARON */
  998. #define WM8400_RROPGARON_SHIFT                       6  /* RROPGARON */
  999. #define WM8400_RROPGARON_WIDTH                       1  /* RROPGARON */
  1000. #define WM8400_RLOPGARON                        0x0020  /* RLOPGARON */
  1001. #define WM8400_RLOPGARON_MASK                   0x0020  /* RLOPGARON */
  1002. #define WM8400_RLOPGARON_SHIFT                       5  /* RLOPGARON */
  1003. #define WM8400_RLOPGARON_WIDTH                       1  /* RLOPGARON */
  1004. #define WM8400_ROPRON                           0x0010  /* ROPRON */
  1005. #define WM8400_ROPRON_MASK                      0x0010  /* ROPRON */
  1006. #define WM8400_ROPRON_SHIFT                          4  /* ROPRON */
  1007. #define WM8400_ROPRON_WIDTH                          1  /* ROPRON */
  1008. #define WM8400_RL12ROP                          0x0004  /* RL12ROP */
  1009. #define WM8400_RL12ROP_MASK                     0x0004  /* RL12ROP */
  1010. #define WM8400_RL12ROP_SHIFT                         2  /* RL12ROP */
  1011. #define WM8400_RL12ROP_WIDTH                         1  /* RL12ROP */
  1012. #define WM8400_RR12ROP                          0x0002  /* RR12ROP */
  1013. #define WM8400_RR12ROP_MASK                     0x0002  /* RR12ROP */
  1014. #define WM8400_RR12ROP_SHIFT                         1  /* RR12ROP */
  1015. #define WM8400_RR12ROP_WIDTH                         1  /* RR12ROP */
  1016. #define WM8400_RROPGAROP                        0x0001  /* RROPGAROP */
  1017. #define WM8400_RROPGAROP_MASK                   0x0001  /* RROPGAROP */
  1018. #define WM8400_RROPGAROP_SHIFT                       0  /* RROPGAROP */
  1019. #define WM8400_RROPGAROP_WIDTH                       1  /* RROPGAROP */
  1020.  
  1021. /*
  1022.  * R54 (0x36) - Speaker Mixer
  1023.  */
  1024. #define WM8400_LB2SPK                           0x0080  /* LB2SPK */
  1025. #define WM8400_LB2SPK_MASK                      0x0080  /* LB2SPK */
  1026. #define WM8400_LB2SPK_SHIFT                          7  /* LB2SPK */
  1027. #define WM8400_LB2SPK_WIDTH                          1  /* LB2SPK */
  1028. #define WM8400_RB2SPK                           0x0040  /* RB2SPK */
  1029. #define WM8400_RB2SPK_MASK                      0x0040  /* RB2SPK */
  1030. #define WM8400_RB2SPK_SHIFT                          6  /* RB2SPK */
  1031. #define WM8400_RB2SPK_WIDTH                          1  /* RB2SPK */
  1032. #define WM8400_LI2SPK                           0x0020  /* LI2SPK */
  1033. #define WM8400_LI2SPK_MASK                      0x0020  /* LI2SPK */
  1034. #define WM8400_LI2SPK_SHIFT                          5  /* LI2SPK */
  1035. #define WM8400_LI2SPK_WIDTH                          1  /* LI2SPK */
  1036. #define WM8400_RI2SPK                           0x0010  /* RI2SPK */
  1037. #define WM8400_RI2SPK_MASK                      0x0010  /* RI2SPK */
  1038. #define WM8400_RI2SPK_SHIFT                          4  /* RI2SPK */
  1039. #define WM8400_RI2SPK_WIDTH                          1  /* RI2SPK */
  1040. #define WM8400_LOPGASPK                         0x0008  /* LOPGASPK */
  1041. #define WM8400_LOPGASPK_MASK                    0x0008  /* LOPGASPK */
  1042. #define WM8400_LOPGASPK_SHIFT                        3  /* LOPGASPK */
  1043. #define WM8400_LOPGASPK_WIDTH                        1  /* LOPGASPK */
  1044. #define WM8400_ROPGASPK                         0x0004  /* ROPGASPK */
  1045. #define WM8400_ROPGASPK_MASK                    0x0004  /* ROPGASPK */
  1046. #define WM8400_ROPGASPK_SHIFT                        2  /* ROPGASPK */
  1047. #define WM8400_ROPGASPK_WIDTH                        1  /* ROPGASPK */
  1048. #define WM8400_LDSPK                            0x0002  /* LDSPK */
  1049. #define WM8400_LDSPK_MASK                       0x0002  /* LDSPK */
  1050. #define WM8400_LDSPK_SHIFT                           1  /* LDSPK */
  1051. #define WM8400_LDSPK_WIDTH                           1  /* LDSPK */
  1052. #define WM8400_RDSPK                            0x0001  /* RDSPK */
  1053. #define WM8400_RDSPK_MASK                       0x0001  /* RDSPK */
  1054. #define WM8400_RDSPK_SHIFT                           0  /* RDSPK */
  1055. #define WM8400_RDSPK_WIDTH                           1  /* RDSPK */
  1056.  
  1057. /*
  1058.  * R55 (0x37) - Additional Control
  1059.  */
  1060. #define WM8400_VROI                             0x0001  /* VROI */
  1061. #define WM8400_VROI_MASK                        0x0001  /* VROI */
  1062. #define WM8400_VROI_SHIFT                            0  /* VROI */
  1063. #define WM8400_VROI_WIDTH                            1  /* VROI */
  1064.  
  1065. /*
  1066.  * R56 (0x38) - AntiPOP1
  1067.  */
  1068. #define WM8400_DIS_LLINE                        0x0020  /* DIS_LLINE */
  1069. #define WM8400_DIS_LLINE_MASK                   0x0020  /* DIS_LLINE */
  1070. #define WM8400_DIS_LLINE_SHIFT                       5  /* DIS_LLINE */
  1071. #define WM8400_DIS_LLINE_WIDTH                       1  /* DIS_LLINE */
  1072. #define WM8400_DIS_RLINE                        0x0010  /* DIS_RLINE */
  1073. #define WM8400_DIS_RLINE_MASK                   0x0010  /* DIS_RLINE */
  1074. #define WM8400_DIS_RLINE_SHIFT                       4  /* DIS_RLINE */
  1075. #define WM8400_DIS_RLINE_WIDTH                       1  /* DIS_RLINE */
  1076. #define WM8400_DIS_OUT3                         0x0008  /* DIS_OUT3 */
  1077. #define WM8400_DIS_OUT3_MASK                    0x0008  /* DIS_OUT3 */
  1078. #define WM8400_DIS_OUT3_SHIFT                        3  /* DIS_OUT3 */
  1079. #define WM8400_DIS_OUT3_WIDTH                        1  /* DIS_OUT3 */
  1080. #define WM8400_DIS_OUT4                         0x0004  /* DIS_OUT4 */
  1081. #define WM8400_DIS_OUT4_MASK                    0x0004  /* DIS_OUT4 */
  1082. #define WM8400_DIS_OUT4_SHIFT                        2  /* DIS_OUT4 */
  1083. #define WM8400_DIS_OUT4_WIDTH                        1  /* DIS_OUT4 */
  1084. #define WM8400_DIS_LOUT                         0x0002  /* DIS_LOUT */
  1085. #define WM8400_DIS_LOUT_MASK                    0x0002  /* DIS_LOUT */
  1086. #define WM8400_DIS_LOUT_SHIFT                        1  /* DIS_LOUT */
  1087. #define WM8400_DIS_LOUT_WIDTH                        1  /* DIS_LOUT */
  1088. #define WM8400_DIS_ROUT                         0x0001  /* DIS_ROUT */
  1089. #define WM8400_DIS_ROUT_MASK                    0x0001  /* DIS_ROUT */
  1090. #define WM8400_DIS_ROUT_SHIFT                        0  /* DIS_ROUT */
  1091. #define WM8400_DIS_ROUT_WIDTH                        1  /* DIS_ROUT */
  1092.  
  1093. /*
  1094.  * R57 (0x39) - AntiPOP2
  1095.  */
  1096. #define WM8400_SOFTST                           0x0040  /* SOFTST */
  1097. #define WM8400_SOFTST_MASK                      0x0040  /* SOFTST */
  1098. #define WM8400_SOFTST_SHIFT                          6  /* SOFTST */
  1099. #define WM8400_SOFTST_WIDTH                          1  /* SOFTST */
  1100. #define WM8400_BUFIOEN                          0x0008  /* BUFIOEN */
  1101. #define WM8400_BUFIOEN_MASK                     0x0008  /* BUFIOEN */
  1102. #define WM8400_BUFIOEN_SHIFT                         3  /* BUFIOEN */
  1103. #define WM8400_BUFIOEN_WIDTH                         1  /* BUFIOEN */
  1104. #define WM8400_BUFDCOPEN                        0x0004  /* BUFDCOPEN */
  1105. #define WM8400_BUFDCOPEN_MASK                   0x0004  /* BUFDCOPEN */
  1106. #define WM8400_BUFDCOPEN_SHIFT                       2  /* BUFDCOPEN */
  1107. #define WM8400_BUFDCOPEN_WIDTH                       1  /* BUFDCOPEN */
  1108. #define WM8400_POBCTRL                          0x0002  /* POBCTRL */
  1109. #define WM8400_POBCTRL_MASK                     0x0002  /* POBCTRL */
  1110. #define WM8400_POBCTRL_SHIFT                         1  /* POBCTRL */
  1111. #define WM8400_POBCTRL_WIDTH                         1  /* POBCTRL */
  1112. #define WM8400_VMIDTOG                          0x0001  /* VMIDTOG */
  1113. #define WM8400_VMIDTOG_MASK                     0x0001  /* VMIDTOG */
  1114. #define WM8400_VMIDTOG_SHIFT                         0  /* VMIDTOG */
  1115. #define WM8400_VMIDTOG_WIDTH                         1  /* VMIDTOG */
  1116.  
  1117. /*
  1118.  * R58 (0x3A) - MICBIAS
  1119.  */
  1120. #define WM8400_MCDSCTH_MASK                     0x00C0  /* MCDSCTH - [7:6] */
  1121. #define WM8400_MCDSCTH_SHIFT                         6  /* MCDSCTH - [7:6] */
  1122. #define WM8400_MCDSCTH_WIDTH                         2  /* MCDSCTH - [7:6] */
  1123. #define WM8400_MCDTHR_MASK                      0x0038  /* MCDTHR - [5:3] */
  1124. #define WM8400_MCDTHR_SHIFT                          3  /* MCDTHR - [5:3] */
  1125. #define WM8400_MCDTHR_WIDTH                          3  /* MCDTHR - [5:3] */
  1126. #define WM8400_MCD                              0x0004  /* MCD */
  1127. #define WM8400_MCD_MASK                         0x0004  /* MCD */
  1128. #define WM8400_MCD_SHIFT                             2  /* MCD */
  1129. #define WM8400_MCD_WIDTH                             1  /* MCD */
  1130. #define WM8400_MBSEL                            0x0001  /* MBSEL */
  1131. #define WM8400_MBSEL_MASK                       0x0001  /* MBSEL */
  1132. #define WM8400_MBSEL_SHIFT                           0  /* MBSEL */
  1133. #define WM8400_MBSEL_WIDTH                           1  /* MBSEL */
  1134.  
  1135. /*
  1136.  * R60 (0x3C) - FLL Control 1
  1137.  */
  1138. #define WM8400_FLL_REF_FREQ                     0x1000  /* FLL_REF_FREQ */
  1139. #define WM8400_FLL_REF_FREQ_MASK                0x1000  /* FLL_REF_FREQ */
  1140. #define WM8400_FLL_REF_FREQ_SHIFT                   12  /* FLL_REF_FREQ */
  1141. #define WM8400_FLL_REF_FREQ_WIDTH                    1  /* FLL_REF_FREQ */
  1142. #define WM8400_FLL_CLK_SRC_MASK                 0x0C00  /* FLL_CLK_SRC - [11:10] */
  1143. #define WM8400_FLL_CLK_SRC_SHIFT                    10  /* FLL_CLK_SRC - [11:10] */
  1144. #define WM8400_FLL_CLK_SRC_WIDTH                     2  /* FLL_CLK_SRC - [11:10] */
  1145. #define WM8400_FLL_FRAC                         0x0200  /* FLL_FRAC */
  1146. #define WM8400_FLL_FRAC_MASK                    0x0200  /* FLL_FRAC */
  1147. #define WM8400_FLL_FRAC_SHIFT                        9  /* FLL_FRAC */
  1148. #define WM8400_FLL_FRAC_WIDTH                        1  /* FLL_FRAC */
  1149. #define WM8400_FLL_OSC_ENA                      0x0100  /* FLL_OSC_ENA */
  1150. #define WM8400_FLL_OSC_ENA_MASK                 0x0100  /* FLL_OSC_ENA */
  1151. #define WM8400_FLL_OSC_ENA_SHIFT                     8  /* FLL_OSC_ENA */
  1152. #define WM8400_FLL_OSC_ENA_WIDTH                     1  /* FLL_OSC_ENA */
  1153. #define WM8400_FLL_CTRL_RATE_MASK               0x00E0  /* FLL_CTRL_RATE - [7:5] */
  1154. #define WM8400_FLL_CTRL_RATE_SHIFT                   5  /* FLL_CTRL_RATE - [7:5] */
  1155. #define WM8400_FLL_CTRL_RATE_WIDTH                   3  /* FLL_CTRL_RATE - [7:5] */
  1156. #define WM8400_FLL_FRATIO_MASK                  0x001F  /* FLL_FRATIO - [4:0] */
  1157. #define WM8400_FLL_FRATIO_SHIFT                      0  /* FLL_FRATIO - [4:0] */
  1158. #define WM8400_FLL_FRATIO_WIDTH                      5  /* FLL_FRATIO - [4:0] */
  1159.  
  1160. /*
  1161.  * R61 (0x3D) - FLL Control 2
  1162.  */
  1163. #define WM8400_FLL_K_MASK                       0xFFFF  /* FLL_K - [15:0] */
  1164. #define WM8400_FLL_K_SHIFT                           0  /* FLL_K - [15:0] */
  1165. #define WM8400_FLL_K_WIDTH                          16  /* FLL_K - [15:0] */
  1166.  
  1167. /*
  1168.  * R62 (0x3E) - FLL Control 3
  1169.  */
  1170. #define WM8400_FLL_N_MASK                       0x03FF  /* FLL_N - [9:0] */
  1171. #define WM8400_FLL_N_SHIFT                           0  /* FLL_N - [9:0] */
  1172. #define WM8400_FLL_N_WIDTH                          10  /* FLL_N - [9:0] */
  1173.  
  1174. /*
  1175.  * R63 (0x3F) - FLL Control 4
  1176.  */
  1177. #define WM8400_FLL_TRK_GAIN_MASK                0x0078  /* FLL_TRK_GAIN - [6:3] */
  1178. #define WM8400_FLL_TRK_GAIN_SHIFT                    3  /* FLL_TRK_GAIN - [6:3] */
  1179. #define WM8400_FLL_TRK_GAIN_WIDTH                    4  /* FLL_TRK_GAIN - [6:3] */
  1180. #define WM8400_FLL_OUTDIV_MASK                  0x0007  /* FLL_OUTDIV - [2:0] */
  1181. #define WM8400_FLL_OUTDIV_SHIFT                      0  /* FLL_OUTDIV - [2:0] */
  1182. #define WM8400_FLL_OUTDIV_WIDTH                      3  /* FLL_OUTDIV - [2:0] */
  1183.  
  1184. void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400);
  1185.  
  1186. #endif
  1187.