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Text File  |  2008-12-24  |  2.4 KB  |  100 lines
  1. /*
  2.  * arch/arm/plat-omap/include/mach/entry-macro.S
  3.  *
  4.  * Low-level IRQ helper macros for OMAP-based platforms
  5.  *
  6.  * This file is licensed under  the terms of the GNU General Public
  7.  * License version 2. This program is licensed "as is" without any
  8.  * warranty of any kind, whether express or implied.
  9.  */
  10. #include <mach/hardware.h>
  11. #include <mach/io.h>
  12. #include <mach/irqs.h>
  13.  
  14. #if defined(CONFIG_ARCH_OMAP1)
  15.  
  16. #if defined(CONFIG_ARCH_OMAP730) && \
  17.     (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
  18. #error "FIXME: OMAP730 doesn't support multiple-OMAP"
  19. #elif defined(CONFIG_ARCH_OMAP730)
  20. #define INT_IH2_IRQ        INT_730_IH2_IRQ
  21. #elif defined(CONFIG_ARCH_OMAP15XX)
  22. #define INT_IH2_IRQ        INT_1510_IH2_IRQ
  23. #elif defined(CONFIG_ARCH_OMAP16XX)
  24. #define INT_IH2_IRQ        INT_1610_IH2_IRQ
  25. #else
  26. #warning "IH2 IRQ defaulted"
  27. #define INT_IH2_IRQ        INT_1510_IH2_IRQ
  28. #endif
  29.  
  30.          .macro    disable_fiq
  31.         .endm
  32.  
  33.         .macro  get_irqnr_preamble, base, tmp
  34.         .endm
  35.  
  36.         .macro  arch_ret_to_user, tmp1, tmp2
  37.         .endm
  38.  
  39.         .macro    get_irqnr_and_base, irqnr, irqstat, base, tmp
  40.         ldr    \base, =IO_ADDRESS(OMAP_IH1_BASE)
  41.         ldr    \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
  42.         ldr    \tmp, [\base, #IRQ_MIR_REG_OFFSET]
  43.         mov    \irqstat, #0xffffffff
  44.         bic    \tmp, \irqstat, \tmp
  45.         tst    \irqnr, \tmp
  46.         beq    1510f
  47.  
  48.         ldr    \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
  49.         cmp    \irqnr, #0
  50.         ldreq    \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
  51.         cmpeq    \irqnr, #INT_IH2_IRQ
  52.         ldreq    \base, =IO_ADDRESS(OMAP_IH2_BASE)
  53.         ldreq    \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
  54.         addeqs    \irqnr, \irqnr, #32
  55. 1510:
  56.         .endm
  57.  
  58. #endif
  59. #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
  60.  
  61. #if defined(CONFIG_ARCH_OMAP24XX)
  62. #include <mach/omap24xx.h>
  63. #endif
  64. #if defined(CONFIG_ARCH_OMAP34XX)
  65. #include <mach/omap34xx.h>
  66. #endif
  67.  
  68. #define INTCPS_SIR_IRQ_OFFSET    0x0040        /* Active interrupt offset */
  69. #define    ACTIVEIRQ_MASK        0x7f        /* Active interrupt bits */
  70.  
  71.         .macro    disable_fiq
  72.         .endm
  73.  
  74.         .macro  get_irqnr_preamble, base, tmp
  75.         .endm
  76.  
  77.         .macro  arch_ret_to_user, tmp1, tmp2
  78.         .endm
  79.  
  80.         .macro    get_irqnr_and_base, irqnr, irqstat, base, tmp
  81.         ldr    \base, =OMAP2_VA_IC_BASE
  82.         ldr    \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
  83.         cmp    \irqnr, #0x0
  84.         bne    2222f
  85.         ldr    \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
  86.         cmp    \irqnr, #0x0
  87.         bne    2222f
  88.         ldr    \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
  89.         cmp    \irqnr, #0x0
  90. 2222:
  91.         ldrne    \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
  92.         and    \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
  93.  
  94.         .endm
  95.  
  96.         .macro    irq_prio_table
  97.         .endm
  98.  
  99. #endif
  100.