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- GateSim(TM) - A Gate Level Simulator
- Condensed Manual Version 1.0
-
-
- 1. OVERVIEW:
-
- The Tanner Research, Inc. simulator GateSim is an event-driven four-state
- (0,1,Z,X) digital logic simulator with the capability of running a 80286/80386
- processor in virtual protected mode to simulate extremely large designs. The
- inner simulation loop is written in assembly language for extremely high
- simulation speed. Circuit primitives include boolean gates, tri-state
- drivers, and/or/invert gates, D flip-flops, latches, pullups, repeatable
- waveform signals, and RAM/ROM models. Each primitive supports gate-specific
- timing delays which may vary from instance to instance. Times are handled as
- 32-bit integers, allowing extremely long simulations. In addition to its
- simulation capabilities, GateSim contains extensive features to support design
- verification, including flexible output formatting, automatic comparison of
- simulation output against an "expected result" file, critical path
- determination, and fault simulation.
-
-
- 2. COMMAND INPUT:
-
- GateSim uses a simple command line interface, patterned after the SILOS
- simulator, but including many TopDOS-like features to facilitate command
- input. Commands to the simulator are distinguished by their first two letters
- (not case sensitive). Comments are allowed in all files and from the
- keyboard, and consist of a $ followed by any number of characters up to an end
- of line. Continuation lines are allowed by placing a '+' as the first
- character on the succeeding line. Commands may also be input from a file,
- either by placing the file name on the DOS command line when the simulator is
- invoked (e.g., gatesim mychip.sim) or by entering a command (e.g., "INput
- mychip.sim") within the simulator. Command files may be nested up to four
- deep. The default extension for command files is SIM.
-
-
- 3. KEYBOARD EDITING:
-
- The keyboard input lines can be edited as in TopDOS, with Epsilon-like
- keystrokes, plus history (^R) and recall (^P and ^N). Arrow keys on the
- numeric keypad are alternatives to move the cursor. There are also keyboard
- macros available (F1 through F10), which can be defined by a command of the
- form:
- @Fn=<text>|<text>...
-
- The | character is interpreted as a carriage return and can also be used from
- the command line directly to input multiple commands on one line. You can
- also invoke a keyboard macro from the command line (or an input file) by a
- line of the form @Fn). The macros can be displayed by typing ^V. Filename
- completion is also supported, using the <Tab> key.
-
- At any time during the execution of most commands (e.g., SIM, DISPLAY, etc.),
- you can press space bar or ^S to halt the display. A message <Pause> will be
- displayed, and pressing any other key will allow the command to continue. If
- you press ^C or a displayable character (e.g., 'A'..'Z'), the message
- <Halt> (Y/N/Q/P)? will be displayed. Typing ^C or 'Y' to this prompt causes
- the command execution to terminate, but execution of any further commands from
- an input file will then continue. Typing a 'Q 'will terminate this command
- and return control to the keyboard, ignoring all input files. Typing a 'P'
- will terminate execution of the current command and return command to the
- keyboard, but the pointer within the current command file will be retained so
- that commands execution can resume via the 'RF' command (for Resume File).
- Any other key (e.g, 'N') will allow execution to continue.
-
-
- 4. INSTALLATION:
-
- To run the simulator, you must copy the files GATESIM.COM, GATESIM.000, and
- GATESIM.001 from their home to a directory on your path. The latter files
- contain the simulator overlay procedures. Due to the overhead of loading the
- overlay files during command input, it is strongly recommended that these
- files reside on a RAM disk.
-
-
- 5. GENERAL COMMAND SYNTAX:
-
- Each command has its own syntax, but the general form is
- COmmand [parameters]* [options]*
- Note that only the first two letters of the command name are signficant; the
- others are optional and are shown in lower case to help clarify the meaning of
- the command.
-
- The options for a command typically take the form '-X [parameter]' or
- '+X [parameter]', where X is the option letter (not case sensitive) and
- the parameter may or may not be required, depending on the option.
-
- When file names are included in the command parameters, they typically must
- be prefaced by '<' for input or '>' for output. These characters may not
- be required if the file name can be otherwise unambigously parsed, but in
- general it is safe to use the '<' and '>' characters. In addition, the output
- can be appended to the output file by using '>>' in front of the file name.
-
-
- 6. SIM COMMANDS:
-
- ADdnet [<]filename
- Read in more parts and add them to the network (default extension NET)
-
-
- ANybad [ON|OFF|?]
- ANYBAD is a boolean variable maintained by the simulator to allow
- accumulation of verify results for use in 'IF' commands. The parameters
- have the following meaning:
- ON - ANYBAD:=TRUE
- OFF - ANYBAD:=FALSE
- ? - ANYBAD:=ANYBAD OR BADVERIFY
-
-
- COmments [on|off|?]
- Enable/disable the display of comments in the simulation results. If
- the '?' is used, the current state of the comments will be displyed.
-
-
- DIsplay [#n] [t0 [TO] t1 [STEP dt]] [>[>]dispfile] [-H] [-N]
- Display RESULTFILE with given time parameters, optionally to a file of
- default extension OUT. If no file is given, the display is to the screen.
- The -H option turns off the hiliting of signal changes on the screen.
- The -N forces lines repeated due to a non-zero step to have all signals
- forced to 'X'.
- If the parameter #n is used, then the output is reformatted according
- to TAB #n (see the .TAB command).
-
-
- DLay d
- Wait for d milleseconds. Useful to slow down the command stream from a
- file to the point that you can read it during demos.
-
-
- DOs
- Push to DOS. Return to GateSim by typing the DOS command 'EXIT'
-
-
- DP pos show shift
- This command controls formatting decimal points in the times output by
- the simulator. The meaning of the three parameters is as follows:
- Pos - Divide the (integer) time by 10^Pos
- Show - Display only this many digits to the right of the '.'
- Shift- 0 ==> lose trailing digit (digit 0)
- 1 ==> lose leading digit (digit 10)
- If Pos=0 (the default), no formatting is performed. Typically, unless
- extremely large times are needed, it is safe to set Shift to 1.
- Here are some examples, using a time of 17234:
- Pos = 0 Output = ' 17234'
- Pos = 1, Show = 1, Shift = 1 Output = ' 1723.4'
- Pos = 1, Show = 1, Shift = 0 Output = ' 1723.'
- Pos = 4, Show = 3, Shift = 0 Output = ' 1.723'
- Pos = 4, Show = 3, Shift = 1 Output = ' 1.723 '
- Pos = 4, Show = 4, Shift = 1 Output = ' 1.7234'
-
-
- EGa43 [on|off]
- Enable or disable the EGA 43 line mode display. Default is off
-
-
- ERrorfile >[>]filename
- Open the file to make a copy of all error/warning messages. If appending
- is specified but the file does not exist, it will first be created.
-
-
- EXit
- Quit the simulator
-
-
- FOrcenode [nodename|nibblename|nodespec] [[~]option]
- Force nodes, including wildcards (? and *). The options are:
- 0 - force to 0
- 1 - force to 1
- X - force to X
- . - force to remain at current value
- Z - unforce
- U - force undetected stuck at 0 and 1
- U0 - force undetected stuck at 0
- U1 - force undetected stuck at 1
- G - force detected stuck at 0 and 1
- G0 - force detected stuck at 0
- G1 - force detected stuck at 1
- M - mark the node
- A tilde (~) causes nodes to be forced to the inverse of the given state.
-
-
- FSim [t0 [TO] t1 [STEP dt]] -C cmpfile [>[>]nodeStatFile] [-R] [-W n] [+W n]
- Do fault simulation for all undetected faults in the network, comparing
- against the cmpfile (default extension CMP). The comparison file must
- look like a simulator output file, lines of the form:
- <time> <signals> <ret>
- where a '.' in the signals is a wild card for comparison.
- The -R option means to use random node ordering. Outputting the results
- can be done to a file (default extension FLT), suitable for reading back
- in as FORCE statements.
- The -W/+W options specify the time window during which the simulation
- results must match the compare file. The default window is [-0,0], so
- a comparison is done only at the comparison file time.
-
-
- GAtes [gatetype|Unnn[.suffix]] [-D] [-S delta] [+S delta] [>[>]filename]
- List all gates of a given type or with a given U number/suffix.
- For example,
- GA AND* gives all AND or AND-OR-INVERT gates
- GA U132 gives all gates with a U number of 132
- The -D option gives detailed information about all pins on each gate,
- as well as delay information and a dump of memory allocated to the
- gate record (largely for debugging purposes).
- The -S/+S options are used to adjust the setup times of all matching
- D flip-flops and latches by the delta time given (-S ==> decrease setup
- time, +S ==> increase). If these options are used, no display is given,
- and the only allowable gate type is '*', but a U number may be specified.
-
-
- HELP or ?
- Give a help screen
-
-
- .HEX [busname=node3,node2,node1,node0]*
- Define a hex nibble for output or input. It is allowable to have
- a node name of ;, which means that the bit of the nibble is ignored.
-
-
- HOriz [on|off|?]
- Enable/Disable the horizontal display of simulation results. The
- default is OFF, so that results are displayed vertically, allowing
- up to 80 columns of output on the screen. If '?' is the parameter,
- the current state of display will be shown
-
-
- IF [NOT] condition THEN command[|command]*
- Conditions supported:
- Badverify - set by all verify/compare operations
- Anybad - set via ANybad commands
-
-
- INput [<]filename
- Take commands from a file (may be nested up to four deep)
-
-
- LIstnode [nodename|nibblename|nodespec] [-Q] [[~]state]* [>[>]filename]
- Display the status of matching nodes, including wildcards (? and *).
- All states given must match for a node to be displayed, and tilde
- means the inverse of a state (e.g., ~0 ==> nodes not forced to 0).
- The nodes are output in alphabetical order, unless the -Q option is
- used, in which case only the totals are given. The states are:
- 0 - nodes forced to 0
- 1 - nodes forced to 1
- X - nodes forced to X
- . - nodes forced to anything
- B - nodes forced to binary values
- U - nodes with undetected stuck at fault(s)
- U0 - nodes with undetected stuck at 0 fault
- U1 - nodes with undetected stuck at 1 fault
- G - nodes with no undetected stuck at fault(s)
- G0 - nodes with detected stuck at 0 fault
- G1 - nodes with detected stuck at 1 fault
- * - all matching nodes (default)
- >n - all nodes with greater than n transitions
- <n - all nodes with less than n transitions
- =n - all nodes with exactly n transitions
- M - all marked nodes
-
- Examples:
- LI * U -- list all nodes with undetected faults
- LI RES* B -- list all nodes on the RES bus forced to binary state
-
-
- MEmory [>memFile] [<memFile]
- Save/restore the state of the simulator. This can generate very large
- files and is not very robust--the simulator versions must be identical
- AND the simulator must be located at exactly the same place in memory
- to reload a file (default extension .MEM). This command is illegal in
- virtual protected mode.
-
-
- MOn [on|off|?]
- Enable/disable display of the results during simulation. If ? is used,
- the current monitor state is shown.
-
-
- NDelay sourceNodes destNodes [minDel] [maxDel] [>[>]filename] [options]
- Output all paths from source to destination nodes which have
- delay >= minDelay (default=0) and <=maxDel (default=32K-1).
- Options:
- -Q : just endpoints of the path
- -R : reverse order
- -S : include setup time in PD
- -L n : only go through n Latches in any one path
- -C n : don't go through more than n DFF CLK pins/Latch G pins
- -X nodeSpec : exclude all matching nodes from search
- -T : display as a tree
- -M : exclude marked nodes from path
- The node specs have the form [~][name | #n] where #n ==> TAB #n.
- Note that the node name can have a wild card. The ~ in a nodespec
- implies negation.
-
-
- NEtfile file
- Read in a network file (default extension NET). See the appendix on
- netlist format for a detailed description of the format for each gate.
-
- The network is in a text file and is part oriented. The netlist format
- is very much like SILOS. Each element has the general form:
- node1 .PARTNAME [time]* [node]*
- Example:
- OUT .NAND 10 12 IN1 IN2 IN3
- Each time a comment of the form: '$ Unn=...' is encountered at the
- beginning of the line, the value nnn is saved as an integer for the
- instance number, and that will be output along with the gate name whenever
- GateSim displays information about that gate (see GAte and NOde commands).
- The gate suffix is set to 0 when such a comment is encountered and
- is incremented each time a new gate is encountered. The gate suffix
- can be modified by a comment of the form #sss. The gate name is
- output in the form PARTNAME [Unnn.sss].
-
- Memory devices have a slightly different format:
- RAMname .SRAM [taccess [thiZ]] CSnode WEnode A0 A1 .. An / D0 .. Dm
- ROMname .ROM [taccess [thiZ]] CSnode A0 A1 .. An / D0 .. Dm
- The name is used for referring to the part in the memory commands.
- It is also the name of the Intel HEX file loaded when the part is
- intialized for simulation.
-
-
- PAttfile filename
- Use the file as the vector file (default extension VEC). The vectors
- consist of .CLK statements, followed by a .PATT statement, with or without
- a fixed delta time. See the netlist format for a description of the
- .CLK statements. The PATT statement has the format:
- .PATT [delta [startTime]] [signalName]*
- [ [time|.time] [signalValues] <ret> ]*
- If no delta is given, the time must be included on each input line.
- However, a '.' means to repeat the last vector input interval, and
- a '.n' means to skip n time units from the previous vector.
- A statement of the form
- IF node = state THEN SKIP [+|-] n
- or IF node <> state THEN SKIP [+|-] n
- or IF node = state THEN HALT
- or IF node <> state THEN HALT
- or IF node = state THEN ECHO string
- or IF node <> state THEN ECHO string
- does just what you think. A skip with n=0 means NOP, while n=-1
- implies to repeat the IF, etc.
- Also, if the first character of the vector (after the optional time)
- is a K, you will be prompted for keyboard vector input, with the
- remainder of the line made available for editing.
- A signal value of '.' means no change from the previous state
-
-
- PDelay sourceNodes destNodes [minDel] [maxDel] [>[>]filename] [options]
- Identical to the NDelay command except that the only source nodes
- considered are the matching nodes which are also outputs of D flip-flops
- or .CLK gates, and destination nodes must be the D pins of D flip-flops
- or latches.
-
-
- PUllup [node]*
- Force certain nodes to have pullups on them, so that if the node
- state goes to Z, it will instead be pulled to 1.
-
-
- QUit
- Quit the simulator
-
-
- RAndomdelay n
- Set the random delay on inputs from the vector file to the range 0..n.
- The default is 0.
-
-
- REsult resultfile
- Output simulation results to the resultfile (default extension OUT).
- The contents of this file can be used to DIsplay, STore, or VErify
- the simulation results.
-
-
- RF [command [|command]* ]
- Resume input from a file (having typed 'P' to halt) after executing
- the command(s) specified. This command is most useful during a simulation
- initiated within a command file, since you can Pause the simulation,
- run any number of diagnostic commands (including pushing to DOS), then
- continue the simulation by typing "RF SIM .".
-
-
- SCroll [on|off]
- Enable scrolling the header display during verify/simulate/display.
- Default is OFF, so the header stays on the screen
-
-
- SFights [on|off|?]
- Enable/disable fight reporting (default=ON). If ? is used, the current
- state of showing fights will be displayed.
-
-
- SImulate [t0 [TO] t1 [STEP dt]] [-C cmpfile [-W n] [+W n]] [-H] [-G] [-Y]
- Simulate over the given time range. If t0 is less than the previous
- ending simulation time, you will be asked if you want to restart, unless
- you override by giving the -Y option.
- You can also compare against a file of default extension CMP (no output
- will be generated), and the simulation will stop (and the Badverify
- flag set) if any discrepancies are found. A '.' in the cmpfile will
- always result in a match for the given node. If the -G option is used,
- the simulation will continue even after Badverify is set. The +W/-W
- options give a comparison time window about the times for the lines
- in cmpfile. The default window is [-0,+0].
- You can also do "SIM +" to continue a simulation with the same time range
- (e.g., sim 0 1000 followed by "SIM +" is the same as sim 1000 2000).
- Similarly, a "SIM ." will complete a halted simulation.
- The -H option turns off the hiliting of signal changes (for MOnitor ON).
-
-
- STore [#n] [t0 [TO] t1 [STEP dt]] [>[>]dispfile] [-N] [-I] [-D]
- Same as DIsplay, but if no file is given, the result is stored to the
- file DISPLAY.OUT. STore options have the following meaning:
- -N ==> output in NCR format (time on right, suppress repeated
- lines due to step by changing signals to 'X')
- -I ==> used in conjunction with -N to keep the NCR format
- without suppressing repeated lines
- If the parameter #n is used, then the output is reformatted according
- to TAB #n (see the .TAB command).
-
-
- .TAb [ [+] [#n] [node [[state]] |nibble|;]* | ? ]
- Select the nodes to be output during simulation or display. The #n
- selects which table is used (TAB 1 to TAB 10); no such parameter implies
- TAB 0, which is the default used for simulation/display. The transitions
- on nodes/nibbles in TAB 0 will be saved to a file for later display or
- verification. A semicolon leaves a space in the display. A '+' means
- append the list to the current table. If a state (0,1,Z,X) is placed
- after a node name in brackets, that node will be displayed in a hilited
- color whenever it is in that state.
- Entering a parameter of ? will force a list of all TAB statements.
-
-
- VErify [t0 [TO] t1 [STEP dt]] [<verffile] [>[>]diffile] [[+|-]O offset]
- Verify RESULTFILE with given time parameters against verffile (default
- extension VRF). Optionally, store (or append) the results to diffile
- (default extension DIF). Sets the badverify flag if a discrepancy
- is detected. If no file is given, the discrepancies are displayed
- using various colors to distinguish them. The +O/-O offset is used
- to do a comparison with a time offset. +O means to add the time
- to the current simulation results before comparing, while -O means
- to add the time to VERFFILE before comparing.
-
-
- VIewvector [on|off|?]
- Enable/disable the display of vectors as comments. If a ? is used, the
- current state of vector display is shown. The default state is ON.
-
-
- WAveform [on|off|?]
- Enable/disable the display of signals as a waveform (using character
- graphics) instead of characters (0,1,Z,X). This feature is only
- supported on EGA displays. If a ? is used, the current state of waveforms
- is displayed. The default state is OFF.
-
-
- WIndow n
- Set the number of lines used for comments when performing a horizontal
- display or simulation. The default is 4. As more lines are used for
- comments, obviously fewer lines are available for signal display.
-
-
-
- 7. MEMORY COMMANDS:
-
- DUmp memName [startaddr [endaddr]] [>[>]file]
- Dump the RAM/ROM of the given name (with optional address range) to a file
- or the screen if no file is specified.
-
-
- VRam memName [startaddr [endaddr]] <file [>[>]difffile]
- Verify the contents of memory against a hex file and display the
- results to the screen or to a file. Sets the badVerify flag if
- any differences are encountered
-
-
- LOadmem memName [startaddr [endaddr]] <file
- Load the contents of RAM/ROM from an INTEL HEX file. When ROMs are
- read from the netlist file, a file of the name memName.HEX is opened
- and the ROM is initialized.
-
-
- POkemem memName startaddr [value]*
- Modify memory with the values
-
-
- FIllmem memName startaddr endaddr value
- Fill a range of memory with a value
-
- APPENDIX A. NETLIST FORMAT
-
- Comments are marked by a '$' character up to the end of the line. A
- '+' on the beginning of a line means that the line is a continuation
- of the previous line. Each element has its own syntax and should be
- placed on its own line(s). Each input node can optionally be
- preceded by a '-' sign to show that the input is inverted before the
- gate function is computed. All delays are parsed as 16 bits integers
- and thus must be in range 0..32767.
-
- Inverter:
- OUT .INV [trise] [tfall] IN
-
-
- Boolean gates: ( up to 9 inputs)
- OUT .AND [trise] [tfall] IN1 IN2 ...
- OUT .NAND [trise] [tfall] IN1 IN2 ...
- OUT .OR [trise] [tfall] IN1 IN2 ...
- OUT .NOR [trise] [tfall] IN1 IN2 ...
- OUT .XOR [trise] [tfall] IN1 IN2 ...
- OUT .XNOR [trise] [tfall] IN1 IN2 ...
-
-
- Tri-State Inverter: (OE is active high)
- OUT .TINV [trise] [tfall] [tZH] [tZL] [tHZ] [tLZ] OE IN
-
-
- D Flip-Flop:
- Q .DFF [tRiseQ] [tFallQ] [tsetQ] [tclrQ]
- + [tRiseQB] [tfallQB] [tsetQB] [tclrQB]
- + [tsetup] [thold] [tMinPulseWidth]
- + QBAR SETBAR CLRBAR D CLK
-
- Latch: (transparent while G is high)
- Q .LATCH [tRiseD] [tFallD] [tRiseG] [tFallG] [tSet] [tClr]
- + [tsetup] [thold] [tMinPulseWidth] SETBAR CLRBAR D G
-
- And-Or-Invert: (max of 24 terms, 8 and gates)
- OUT .AOI [tRise] [tFall] A0 A1 ... / B0 B1 .. / C0 C1 ...
-
-
- Or-And-Invert: (max of 24 terms, 8 and gates)
- OUT .OAI [tRise] [tFall] A0 A1 ... / B0 B1 .. / C0 C1 ...
-
- CMOS Transfer Gate:
- OUT .CXFR [tRise] [tFall] EN ENBAR IN
-
- RAM: (maximum of 14 address pins, 8 data pins )
- NAME .SRAM [tAccess] [tHiZ] [tsetupD]
- + CSBAR WEBAR A0 A1 .. An / D0 .. Dn
-
- ROM: (maximum of 14 address pins, 8 data pins )
- NAME .ROM [tAccess] [tHiZ]
- + CSBAR A0 A1 .. An / D0 .. Dn
-
- PULLUP:
- NODE .PULLUP
-
- CLK: (repeatable waveform)
- NODE .CLK time state [time state]* [.REP time]
-
-
-
- GateSim is a trademark of Tanner Research, Inc. Other brand and product names
- are trademarks or registered trademarks of their respective holders.
- Copyright (c) 1988 Tanner Research, Inc.
-
-
- Tanner Research, Inc.
- 128 West Del Mar Boulevard
- Pasadena, CA 91105
-
- (818) 795-1696
-