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  1. /*    Oak Techologies OTI-067/077/087 mode definitions
  2.  *    
  3.  *     12 September 1994 Christopher M. Wiles (a0017097@wsuaix.csc.wsu.edu)
  4.  *    The below mode definitions work just fine on my '87 board.  As I
  5.  *    do not have either a '67 or a '77 to play with, I cannot guarantee
  6.  *    that any or all of these modes will work with cards based on those
  7.  *    chips.  Therefore, use at your own risk (and let me know if they work).
  8.  *
  9.  *    NB: If any of these modes are displaced horizontally, change the fifth
  10.  *    byte (in units of 8) of the CRTC section in the definition in 
  11.  *    question.  Increment the value to move the screen left, decrement to
  12.  *    move the screen right.
  13.  */
  14.  
  15. static const unsigned char g640x480x256_regs[79] = {
  16.     /* CRTC */
  17.     0x63,0x4F,0x50,0x86,0x58,0x81,0x06,0x3E,0x00,0x40,0x00,0x00,
  18.     0x00,0x00,0x00,0x00,0xE8,0x8b,0xDF,0x28,0x00,0xE4,0x01,0xC3,
  19.     /* ATC */
  20.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,
  21.     0x0c,0x0d,0x0e,0x0f,0x01,0x00,0x0f,0x00,0x00,
  22.     /* Graphics */
  23.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff,
  24.     /* Sequencer */
  25.     0x03,0x09,0x0f,0x00,0x0e,
  26.     /* Misc. output */
  27.     0xE3,
  28.     /* Extended registers */
  29.     0xC0, 0x8F, 0x80, 0x00, 0x01, 0x00, 0x00, 0xFF,
  30.     /* 087 native registers */
  31.     0x0f, 0x00, 0x00, 0x00, 0x0f, 0x04, 0x04, 0x00,
  32.     0x00, 0x00, 0x00
  33.  
  34. };
  35.  
  36. static const unsigned char g800x600x16_regs[79] = {
  37.     /* CRTC */
  38.     0x7f,0x63,0x64,0x82,0x6c,0x1f,0x72,0xf0,0x00,0x60,0x00,0x00,
  39.     0x00,0x00,0x00,0x00,0x58,0x8c,0x57,0x32,0x0f,0x58,0x6e,0xe3,
  40.     /* ATC */
  41.     0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,
  42.     0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00,
  43.     /* Graphics */
  44.     0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff,
  45.     /* Sequencer */
  46.     0x03,0x01,0x0f,0x00,0x06,
  47.     /* Misc. output */
  48.     0xeb,
  49.     /* Extended registers */
  50.     0x00, 0x28, 0xff, 0x00, 0xff, 0x00, 0x00, 0xff,
  51.     /* 087 Native registers */
  52.     0x06, 0x00, 0x40, 0x00, 0x0f, 0x03, 0x00, 0x08,
  53.     0x00, 0x00, 0x00
  54.  
  55. };
  56.  
  57. static const unsigned char g800x600x256_regs[79] = {
  58.     /* CRTC */
  59.     0x7f,0x63,0x64,0x82,0x6c,0x1f,0x72,0xf0,0x00,0x60,0x00,0x00,
  60.     0x00,0x00,0x00,0x00,0x58,0x8c,0x57,0x32,0x0f,0x58,0x6e,0xe3,
  61.     /* ATC */
  62.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,
  63.     0x0c,0x0d,0x0e,0x0f,0x01,0x00,0x0f,0x00,0x00,
  64.     /* Graphics */
  65.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff,
  66.     /* Sequencer */
  67.     0x03,0x01,0x0f,0x00,0x0e,
  68.     /* Misc. output */
  69.     0xeb,
  70.     /* Extended registers */
  71.     0x00, 0x2e, 0xff, 0x00, 0xff, 0x00, 0x40, 0xff,
  72.     /* 087 native registers */
  73.     0x06, 0x00, 0x40, 0x00, 0x0f, 0x06, 0x04, 0x08,
  74.     0x00, 0x00, 0x00
  75.  
  76. };
  77.  
  78. static const unsigned char g1024x768x256_regs[79] = {
  79.     /* CRTC */
  80.     0xa3,0x7f,0x80,0x86,0x89,0x9a,0x24,0xfd,0x00,0x60,0x00,0x00,
  81.     0x00,0x00,0x00,0x00,0x02,0x88,0xff,0x40,0x0f,0x02,0x20,0xe3,
  82.     /* ATC */
  83.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,
  84.     0x0c,0x0d,0x0e,0x0f,0x01,0x00,0x0f,0x00,0x00,
  85.     /* Graphics */
  86.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff,
  87.     /* Sequencer */
  88.     0x03,0x01,0x0f,0x00,0x0e,
  89.     /* Misc. output */
  90.     0x2b,
  91.     /* Extended registers */
  92.     0x00, 0x0d, 0xff, 0x00, 0xff, 0x00, 0x4f, 0xff,
  93.     /* 087 native registers */
  94.     0x0b, 0x00, 0x4f, 0x00, 0x0f, 0x05, 0x04, 0x04,
  95.     0x00, 0x00, 0x00
  96.  
  97. };
  98.  
  99. static const unsigned char g640x480x32K_regs[79] = {
  100.     /* CRTC */
  101.     0xcb,0x9f,0xa1,0x8d,0xad,0x0f,0x0b,0x3e,0x00,0x40,0x00,0x00,
  102.     0x00,0x00,0x00,0x00,0xe8,0x8b,0xdf,0x50,0x00,0xe4,0x01,0xc3,
  103.     /* ATC */
  104.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,
  105.     0x0c,0x0d,0x0e,0x0f,0x01,0x00,0x0f,0x00,0x00,
  106.     /* Graphics */
  107.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff,
  108.     /* Sequencer */
  109.     0x03,0x01,0x0f,0x00,0x0e,
  110.     /* Misc. output */
  111.     0xe3,
  112.     /* Extended registers */
  113.     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  114.     /* 087 native registers */
  115.     0x0f, 0x00, 0x00, 0x00, 0x0f, 0x08, 0x04, 0x08,
  116.     0x00, 0x00, 0xa0
  117. };
  118.  
  119. static const unsigned char g800x600x32K_regs[79] = {
  120.     /* CRTC */
  121.     0xff,0xc7,0xc9,0x81,0xd9,0x04,0x72,0xf0,0x00,0x60,0x00,0x00,
  122.      0x00,0x00,0x00,0x00,0x58,0x8c,0x57,0x64,0x0f,0x58,0x6e,0xe3,
  123.     /* ATC */
  124.      0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,
  125.      0x0c,0x0d,0x0e,0x0f,0x01,0x00,0x0f,0x00,0x00,
  126.     /* Graphics */
  127.      0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff,
  128.     /* Sequencer */
  129.      0x03,0x01,0x0f,0x00,0x0e,
  130.     /* Misc. output */
  131.      0xeb,
  132.     /* Extended registers */
  133.      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  134.     /* 087 native registers */
  135.     0x0a, 0x00, 0x00, 0x00, 0x0f, 0x0a, 0x04, 0x08,
  136.      0x00, 0x00, 0xa0
  137.  
  138. };
  139.  
  140. static const unsigned char g1280x1024x16_regs[79] = {
  141.     /* CRTC */
  142.     0xc3,0x9f,0xa0,0x86,0xa2,0x17,0x2e,0xb2,0x00,0x60,0x00,0x00,
  143.     0x00,0x00,0x00,0x00,0x0d,0x9c,0xff,0x50,0x0f,0x04,0x29,0xe3,
  144.     /* ATC */
  145.     0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,
  146.     0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00,
  147.     /* Graphics */
  148.     0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff,
  149.     /* Sequencer */
  150.     0x03,0x01,0x0f,0x00,0x06,
  151.     /* Misc. output */
  152.     0x2b,
  153.     /* Extended registers */
  154.     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  155.     /* 087 native registers */
  156.     0x0a, 0x80, 0x4f, 0x00, 0x0f, 0x05, 0x00, 0x08,
  157.     0x00, 0x00, 0x00    
  158.  
  159. };
  160.  
  161. /* HighRes 16 color modes based on 256 color modes */
  162. #define g1024x768x16_regs g1024x768x256_regs
  163.