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Text File  |  1995-01-18  |  16.0 KB  |  545 lines
  1. /* VGAlib version 1.2 - (c) 1993 Tommy Frandsen            */
  2. /*                                   */
  3. /* This library is free software; you can redistribute it and/or   */
  4. /* modify it without any restrictions. This library is distributed */
  5. /* in the hope that it will be useful, but without any warranty.   */
  6.  
  7. /* Multi-chipset support Copyright 1993 Harm Hanemaayer */
  8.  
  9. /* These are the fixed SVGA-derived 320x200x256 registers that allow for */
  10. /* full video memory utilitization (e.g. page-flipping). */
  11. static unsigned char g320x200x256_regs[95] = {
  12.     /* CRTC */
  13.     0x2D,0x27,0x2A,0x8F,0x2B,0x8F,0xC0,0x1F,0x00,0xc0,0x00,0x00,
  14.     0x00,0x00,0x00,0x00,0x98,0x2C,0x8F,0x28,0x00,0x98,0x99,0xC3,
  15.     /* ATC */
  16.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  17.     0x0C,0x0D,0x0E,0x0F,0x41,0xFF,0x0F,0x00,0x00,
  18.     /* Graphics */
  19.     0x0F,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  20.     /* Sequencer */
  21.     0x03,0x01,0x0F,0x00,0x0E,
  22.     /* Misc. Output */
  23.     0x6F,
  24.     /* Extended CRTC */
  25.     0xFF,0x00,0x00,0x22,
  26.     /* Extended Graphics */
  27.     0x00,0x00,0x00,
  28.     /* Extended Sequencer */
  29.     0x0F,0x12,0x01,0x80,0x0C,0x19,0x4A,0x5B,0x45,0x25,0xB0,0x00,
  30.     0x00,0x00,0x00,0x00,0x00,0xD8,0x00,0x00,0x01,0x00,0x2B,0x2F,
  31.     0x30,0x2b,0x1c,
  32.     /* Cirrus DAC */
  33.     0x00
  34. };
  35.  
  36. static const unsigned char g640x480x256_regs[95] = {
  37.     /* CRTC */
  38.     0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x00,0x00,
  39.     0x00,0x00,0x00,0x00,0xEA,0x8C,0xDF,0x50,0x60,0xE7,0x04,0xAB,
  40.     /* ATC */
  41.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  42.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  43.     /* Graphics */
  44.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  45.     /* Sequencer */
  46.     0x03,0x01,0x0F,0x00,0x0E,
  47.     /* misc. output */
  48.     0xe3,    /* use standard VGA dot clock 25 MHz */
  49.     /* extra CRT registers: */
  50.     0x00,0x00,0x00,
  51.     0x22,    /* bit 4 is high bit of scanline length */
  52.     /* extra graphics registers: */
  53.     0x00,0x00,0x00,
  54.     /* extra sequencer registers: */
  55.     0x0f,0x12,
  56.     0x01,    /* (0x07) indicates number of colors */
  57.     0x80,
  58.     0x01,    /* (0x09) bits 2-4: monitor type */
  59.     0x19,0x4a,0x5b,0x45,
  60.     0x4a,    /* (0x0e) dot clock */
  61.     0x30,    /* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
  62.     0x00,0x00,
  63.     0x00,0x00,0x00,0x00,
  64.     0xd8,    /* 'Performance Tuning Register', default is 0xd8. */
  65.         /* 0xd8 = 11011000    write delay = 3, I/O delay = 2 */
  66.         /* 0xc8 = 11001000    write delay = 2, I/O delay = 2 */
  67.     0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  68.     0x2b,    /* (0x1e) dot clock */
  69.     0x1c,    /* Internal memory clock. Not changed. */
  70.     0x00    /* Hicolor DAC */
  71. };
  72.  
  73. static const unsigned char g640x480x32K_regs[95] = {
  74.     /* CRTC */
  75.     0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x00,0x00,
  76.     0x00,0x00,0x00,0x00,0xEA,0x8C,0xDF,
  77.     0xa0, /* (0x13) bytes in scanline (was 0x50) */
  78.     0x60,0xE7,0x04,0xAB,
  79.     /* ATC */
  80.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  81.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  82.     /* Graphics */
  83.     0x00,0x00,0x00,0x00,0x00,0x40,0x07,0x0F,0xFF,
  84.     /* Sequencer */
  85.     0x03,0x01,0x0F,0x00,0x0E,
  86.     /* misc. output */
  87.     0xEF,    /* use VLCK3 (was 0xE3: VGA 25Mhz) */    
  88.     /* extra CRT registers: */
  89.     0x00,0x00,0x00,
  90.     0x22, /* bit 0: ?; bit 2: ? (frame); bit 6: wrap at 256K */
  91.     /* extra graphics registers: */
  92.     0x20,0x00,0x00,
  93.     /* extra sequencer registers: */
  94.     0x0f,0x12,
  95.     0x03,    /* (0x07) indicates number of colors */
  96.     0x80,
  97.     0x0d,    /* (0x09) bits 2-4: monitor type */
  98.     0x19,0x4a,0x5b,0x45,
  99.     0x65,    /* (0x0e) dot clock (bytes): 49.87 MHz */
  100.     0x30,    /* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
  101.     0x00,0x00,
  102.     0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  103.     0x3a,    /* (0x1e) dot clock */
  104.     0x1c,
  105.     0xf0    /* Hicolor DAC */
  106. };
  107.  
  108. static const unsigned char g640x480x16M_regs[95] = {
  109.     /* CRTC */
  110.     0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x00,0x00,
  111.     0x00,0x00,0x00,0x00,0xEA,0x8C,0xDF,
  112.     0xf0, /* (0x13) bytes in scanline / 8 */
  113.     0x60,0xE7,0x04,0xAB,
  114.     /* ATC */
  115.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  116.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  117.     /* Graphics */
  118.     0x00,0x00,0x00,0x00,0x00,
  119.     0x00,    /* 0x40 for other modes */
  120.     0x05,
  121.     0x0F,0xFF,
  122.     /* Sequencer */
  123.     0x03,0x01,0x0F,0x00,0x0E,
  124.     /* misc. output */
  125.     0xEF,    /* use VLCK3 (was 0xE3: VGA 25Mhz) */    
  126.     /* extra CRT registers: */
  127.     0x00,0x00,0x00,
  128.     0x22, /* bit 0: ?; bit 2: ? (frame); bit 6: wrap at 256K */
  129.     /* extra graphics registers: */
  130.     0x20,0x00,0x00,
  131.     /* extra sequencer registers: */
  132.     0x0f,0x12,
  133.     0x05,    /* (0x07) indicates number of colors */
  134.     0x80,
  135.     0x0d,    /* (0x09) bits 2-4: monitor type */
  136.     0x19,0x4a,0x5b,0x45,
  137.     0x3a,    /* (0x0e) dot clock (bytes): 75 MHz*/
  138.     0x30,    /* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
  139.     0x00,0x00,
  140.     0x00,0x00,0x00,0x00,
  141.     0xdd,    /* 0xd8 for other modes */
  142.     0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  143.     0x16,    /* (0x1e) dot clock */
  144.     0x1c,
  145.     0xe5    /* Hicolor DAC */
  146. };
  147.  
  148. static const unsigned char g800x600x256_regs[95] = {
  149.     /* CRTC */
  150.     0x7b,0x63,0x64,0x9e,0x69,0x92,0x6f,0xf0,0x00,0x60,0x00,0x00,
  151.     0x00,0x00,0x02,0xbc,0x58,0x8a,0x57,0x64,0x00,0x58,0x6f,0xe3,
  152.     /* ATC */
  153.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  154.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  155.     /* Graphics */
  156.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  157.     /* Sequencer */
  158.     0x03,0x01,0x0F,0x00,0x0E,
  159.     /* misc. output */
  160.     0x2f,
  161.     /* extra CRT registers: */
  162.     0xff,
  163.     0x00,    /* interlaced: CR0 / 2? */
  164.     0x00,    /* sync overflow bits; bit 0 set for interlaced */
  165.     0x22,    /* note: bit 4 is high bit of logical scanline length */
  166.     /* extra graphics registers: */
  167.     0x00,0x00,0x00,
  168.     /* extra sequencer registers: */
  169.     0x0f,0x12,0x01,0x80,
  170.     0x05,    /* (0x09) monitor type */
  171.     0x19,0x4a,0x5b,0x45,
  172.     0x7e,    /* (0x0e) dot clock: 36 MHz */
  173.     0x30,0x00,0x00,
  174.     0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  175.     0x33,    /* (0x1e) dot clock */
  176.     0x1c,
  177.     0x00    /* Hicolor DAC */
  178. };
  179.  
  180. static const unsigned char g800x600x16_regs[95] = {
  181.     /* CRTC */
  182.     0x7b,0x63,0x64,0x9e,0x69,0x92,0x6f,0xf0,0x00,0x60,0x00,0x00,
  183.     0x00,0x00,0x02,0xc8,0x58,0x8a,0x57,0x32,0x00,0x58,0x6f,0xe3,
  184.     /* ATC */
  185.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  186.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  187.     /* Graphics */
  188.     0x00,0x0F,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,
  189.     /* Sequencer */
  190.     0x03,0x01,0x0F,0x00,0x06,
  191.     /* misc. output */
  192.     0x2f,
  193.     /* extra CRT registers: */
  194.     0xff,0x00,0x00,0x22,
  195.     /* extra graphics registers: */
  196.     0x00,0x00,0x00,
  197.     /* extra sequencer registers: */
  198.     0x0f,0x12,0x00,0x80,0x05,0x19,0x4a,0x5b,0x45,0x7e,0x10,0x00,
  199.     0x00,0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,
  200.     0x30,0x33,0x1c,
  201.     /* Hicolor DAC */
  202.     0x00
  203. };
  204.  
  205. /* Interlaced. */
  206. static const unsigned char g1024x768x16i_regs[95] = {
  207.     /* CRTC */
  208.     0x99,0x7f,0x80,0x9c,0x83,0x19,0x96,0x1f,0x00,0x40,0x00,0x00,
  209.     0x00,0x00,0x01,0x00,0x80,0x84,0x7f,0x40,0x00,0x80,0x96,0xe3,
  210.     /* ATC */
  211.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  212.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  213.     /* Graphics */
  214.     0x00,0x0F,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,
  215.     /* Sequencer */
  216.     0x03,0x01,0x0F,0x00,0x06,
  217.     /* misc. output */
  218.     0x2f,
  219.     /* extra CRT registers: */
  220.     0xff,0x4a,0x01,0x22,
  221.     /* extra graphics registers: */
  222.     0x00,0x00,0x00,
  223.     /* extra sequencer registers: */
  224.     0x0f,0x12,0x00,0x80,0x0c,0x19,0x4a,0x5b,0x45,0x55,0x10,0x00,
  225.     0x00,0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,
  226.     0x30,0x36,0x1c,
  227.     /* Hicolor DAC */
  228.     0x00
  229. };
  230.  
  231. /* Non-interlaced. */
  232. static const unsigned char g1024x768x16_regs[95] = {
  233.     /* CRTC */
  234.     0xa1,0x7f,0x80,0x84,0x84,0x92,0x2a,0xfd,0x00,0x60,0x00,0x00,
  235.     0x00,0x00,0x04,0x00,0x12,0x89,0xff,0x40,0x00,0x00,0x2a,0xe3,
  236.     /* ATC */
  237.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  238.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  239.     /* Graphics */
  240.     0x00,0x0F,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,
  241.     /* Sequencer */
  242.     0x00,0x01,0x0F,0x00,0x06,
  243.     /* misc. output */
  244.     0xef,
  245.     /* extra CRT registers: */
  246.     0xff,0x4a,0x00,0x22,
  247.     /* extra graphics registers: */
  248.     0x00,0x00,0x00,
  249.     /* extra sequencer registers: */
  250.     0x0f,0x12,0x00,0x80,0x1c,0x51,0x4a,0x5b,0x45,0x61,0x10,0x00,
  251.     0x00,0x00,0x00,0x00,0x00,0xdd,0x00,0x00,0x01,0x00,0x2b,0x2f,
  252.     0x30,0x24,0x1c,
  253.     /* Hicolor DAC */
  254.     0x00
  255. };
  256.  
  257. static const unsigned char g1280x1024x16i_regs[95] = {
  258.     /* CRTC */
  259.     0xbd,0x9f,0xa0,0x80,0xa4,0x19,0x2a,0xb2,0x00,0x60,0x00,0x00,
  260.     0x00,0x00,0x0f,0x00,0x0b,0x80,0xff,0x50,0x00,0x00,0x2a,0xe3,
  261.     /* ATC */
  262.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  263.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  264.     /* Graphics */
  265.     0x00,0x0F,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,
  266.     /* Sequencer */
  267.     0x00,0x01,0x0F,0x00,0x06,
  268.     /* misc. output */
  269.     0xef,
  270.     /* extra CRT registers: */
  271.     0xff,0x60,0x01,0x22,
  272.     /* extra graphics registers: */
  273.     0x00,0x00,0x00,
  274.     /* extra sequencer registers: */
  275.     0x0f,0x12,0x00,0x80,0x1c,0x51,0x4a,0x5b,0x45,0x6e,0x10,0x00,
  276.     0x00,0x00,0x00,0x00,0x00,0xdd,0x00,0x00,0x01,0x00,0x2b,0x2f,
  277.     0x30,0x2a,0x1c,
  278.     /* Hicolor DAC */
  279.     0x00
  280. };
  281.  
  282. static const unsigned char g800x600x32K_regs[95] = {
  283.     /* CRTC */
  284.     0x7b,0x63,0x64,0x9e,0x69,0x92,0x6f,0xf0,0x00,0x60,0x00,0x00,
  285.     0x00,0x00,0x02,0xbc,0x58,0x8a,0x57,
  286.     0xc8,    /* bytes in scanline / 8 */
  287.     0x00,0x58,0x6f,0xe3,
  288.     /* ATC */
  289.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  290.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  291.     /* Graphics */
  292.     0x00,0x00,0x00,0x00,0x00,0x40,0x07,0x0F,0xFF,
  293.     /* Sequencer */
  294.     0x03,0x01,0x0F,0x00,0x0E,
  295.     /* misc. output */
  296.     0xef,
  297.     /* extra CRT registers: */
  298.     0xff,
  299.     0x00,    /* interlaced: CR0 / 2? */
  300.     0x00,    /* sync overflow bits; bit 0 set for interlaced */
  301.     0x22,    /* note: bit 4 is high bit of logical scanline length */
  302.     /* extra graphics registers: */
  303.     0x10,0x00,0x00,
  304.     /* extra sequencer registers: */
  305.     0x0f,0x12,0x03,0x80,
  306.     0x0d,    /* (0x09) monitor type */
  307.     0x19,0x4a,0x5b,0x45,
  308.     0x7e,    /* (0x0e) dot clock: 72 MHz */
  309.     0x30,0x00,0x00,
  310.     0x00,0x00,0x00,0x00,0xdd,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  311.     0x32,    /* (0x1e) dot clock */
  312.     0x1c,
  313.     0xf0    /* Hicolor DAC */
  314. };
  315.  
  316. #if CIRRUS_HIGHDOTCLOCK
  317. static const unsigned char g800x600x16M_regs[95] = {
  318.     /* CRTC */
  319.     0x7b,0x63,0x64,0x9e,0x69,0x92,0x6f,0xf0,0x00,0x60,0x00,0x00,
  320.     0x00,0x00,0x02,0xbc,0x58,0x8a,0x57,
  321.     0x2c, /* (0x13) bytes in scanline / 8 */
  322.     0x00,0x58,0x6f,0xe3,
  323.     /* ATC */
  324.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  325.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  326.     /* Graphics */
  327.     0x00,0x00,0x00,0x00,0x00,
  328.     0x40,
  329.     0x05,
  330.     0x0F,0xFF,
  331.     /* Sequencer */
  332.     0x03,0x01,0x0F,0x00,0x0E,
  333.     /* misc. output */
  334.     0xEF,    /* use VLCK3 */    
  335.     /* extra CRT registers: */
  336.     0x00,0x00,0x00,
  337.     0x32, /* bit 4: high bit of logical scanline length (set) */
  338.     /* extra graphics registers: */
  339.     0x20,0x00,0x00,
  340.     /* extra sequencer registers: */
  341.     0x0f,0x12,
  342.     0x05,    /* (0x07) indicates number of colors */
  343.     0x80,
  344.     0x0d,    /* (0x09) bits 2-4: monitor type */
  345.     0x19,0x4a,0x5b,0x45,
  346.     (CIRRUS_HIGHDOTCLOCK == 1 ? 0x5e : 0x52),
  347.         /* (0x0e) dot clock (bytes): 96.1 MHz / 108.3 MHz */
  348.     0xb0,    /* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
  349.     0x00,0x00,
  350.     0x00,0x00,0x00,0x00,
  351.     0xdd,
  352.     0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  353.     (CIRRUS_HIGHDOTCLOCK == 1 ? 0x1c : 0x16),
  354.         /* (0x1e) dot clock: 96.1 MHz / 108.3 MHz */
  355.     0x1c,
  356.     0xe5    /* Hicolor DAC */
  357. };
  358. #endif
  359.  
  360. /* Interlaced */
  361. static const unsigned char g1024x768x256i_regs[95] = {
  362.     /* CRTC */
  363.     0x99,0x7F,0x80,0x9c,0x83,0x19,0x96,0x1f,0x00,
  364.     0x40,
  365.     0x00,0x00,
  366.     0x00,0x00,0x03,0x80,0x80,0x84,0x7F,0x80,0x00,0x80,0x96,0xE3,
  367.     /* ATC */
  368.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  369.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  370.     /* Graphics */
  371.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  372.     /* Sequencer */
  373.     0x03,0x01,0x0F,0x00,0x0E,
  374.     /* misc. output */
  375.     0x2f,
  376.     /* extra CRT registers: */
  377.     0xff,0x4a,0x01,0x22,
  378.     /* extra graphics registers: */
  379.     0x10,0x00,0x00,
  380.     /* extra sequencer registers: */
  381.     0x0f,0x12,0x01,0x80,0x04,0x19,0x4a,0x5b,0x45,
  382.     0x55,     /* (0x0e) dot clock: 45 MHz */
  383.     0x30,0x00,0x00,
  384.     0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  385.     0x36,    /* (0x1e) dot clock */
  386.     0x1c,
  387.     0x00    /* Hicolor DAC */
  388. };
  389.  
  390. /* Non-interlaced. */
  391. static const unsigned char g1024x768x256_regs[95] = {
  392.     /* CRTC */
  393.     0xa1,0x7f,0x80,0x84,0x84,0x92,0x2a,0xfd,0x00,0x60,0x00,0x00,
  394.     0x00,0x00,0x04,0x00,0x12,0x89,0xff,0x80,0x00,0x00,0x2a,0xe3,
  395.     /* ATC */
  396.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  397.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  398.     /* Graphics */
  399.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,
  400.     /* Sequencer */
  401.     0x03,0x01,0x0F,0x00,0x0e,
  402.     /* misc. output */
  403.     0xef,
  404.     /* extra CRT registers: */
  405.     0xff,0x4a,0x00,0x22,
  406.     /* extra graphics registers: */
  407.     0x10,0x00,0x00,
  408.     /* extra sequencer registers: */
  409.     0x0f,0x12,0x01,0x80,0x1c,0x51,0x4a,0x5b,0x45,0x61,0x30,0x00,
  410.     0x00,0x00,0x00,0x00,0x00,0xdd,0x00,0x00,0x01,0x00,0x2b,0x2f,
  411.     0x30,0x24,0x1c,
  412.     /* Hicolor DAC */
  413.     0x00
  414. };
  415.  
  416. /* Interlaced */
  417. static const unsigned char g1024x768x32K_regs[95] = {
  418.     /* CRTC */
  419.     0x99,0x7F,0x80,0x9c,0x83,0x19,0x96,0x1f,0x00,
  420.     0x40,
  421.     0x00,0x00,
  422.     0x00,0x00,0x03,0x80,0x80,0x84,0x7F,0x00,0x00,0x80,0x96,0xE3,
  423.     /* ATC */
  424.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  425.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  426.     /* Graphics */
  427.     0x00,0x00,0x00,0x00,0x00,0x40,0x07,0x0F,0xFF,
  428.     /* Sequencer */
  429.     0x03,0x01,0x0F,0x00,0x0E,
  430.     /* misc. output */
  431.     0x2f,
  432.     /* extra CRT registers: */
  433.     0xff,0x4a,0x01,0x32,
  434.     /* extra graphics registers: */
  435.     0x00,0x00,0x00,
  436.     /* extra sequencer registers: */
  437.     0x0f,0x12,0x07,0x80,0x0d,0x19,0x4a,0x5b,0x45,
  438.     0x55,     /* (0x0e) dot clock: 45 MHz */
  439.     0xb0,0x00,0x00,
  440.     0x00,0x00,0x00,0x00,0xdf,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  441.     0x36,    /* (0x1e) dot clock */
  442.     0x1c,
  443.     0xf0    /* Hicolor DAC */
  444. };
  445.  
  446. static const unsigned char g320x200x32K_regs[95] = {
  447.     /* CRTC */
  448.     0x2d,0x27,0x27,0x91,0x2a,0x90,0xbf,0x1f,0x00,0xc0,0x00,0x00,
  449.     0x00,0x00,0x01,0x90,0x9c,0x8e,0x8f,0x50,0x00,0x97,0xb8,0xe3,
  450.     /* ATC */
  451.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  452.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  453.     /* Graphics */
  454.     0x00,0x00,0x00,0x00,0x00,0x40,0x07,0x0F,0xFF,
  455.     /* Sequencer */
  456.     0x03,0x01,0x0F,0x00,0x0E,
  457.     /* misc. output */
  458.     0x63,
  459.     /* extra CRT registers: */
  460.     0xff,0x00,0x00,0x22,
  461.     /* extra graphics registers: */
  462.     0x00,0x00,0x00,
  463.     /* extra sequencer registers: */
  464.     0x0f,0x12,
  465.     0x03,    /* (0x07) indicates number of colors */
  466.     0x80,
  467.     0x01,    /* (0x09) bits 2-4: monitor type */
  468.     0x19,0x4a,0x5b,0x45,
  469.     0x7e,    /* (0x0e) dot clock */
  470.     0x30,    /* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
  471.     0x00,0x00,
  472.     0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  473.     0x33,    /* (0x1e) dot clock */
  474.     0x1c,
  475.     0xf0    /* Hicolor DAC */
  476. };
  477.  
  478. static const unsigned char g320x200x16M_regs[95] = {
  479.     /* CRTC */
  480.     0x2d,0x27,0x27,0x91,0x2a,0x90,0xbf,0x1f,0x00,0xc0,0x00,0x00,
  481.     0x00,0x00,0x01,0x90,0x9c,0x8e,0x8f,0x78,0x00,0x97,0xb8,0xe3,
  482.     /* ATC */
  483.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  484.     0x0C,0x0D,0x0E,0x0F,0x01,0x00,0x0F,0x00,0x00,
  485.     /* Graphics */
  486.     0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,
  487.     /* Sequencer */
  488.     0x03,0x01,0x0F,0x00,0x0E,
  489.     /* misc. output */
  490.     0x6f,
  491.     /* extra CRT registers: */
  492.     0xff,0x00,0x00,0x22,
  493.     /* extra graphics registers: */
  494.     0x00,0x00,0x00,
  495.     /* extra sequencer registers: */
  496.     0x0f,0x12,
  497.     0x05,    /* (0x07) indicates number of colors */
  498.     0x80,
  499.     0x01,    /* (0x09) bits 2-4: monitor type */
  500.     0x19,0x4a,0x5b,0x45,
  501.     0x1d,    /* (0x0e) dot clock */
  502.     0x30,    /* (0x0f) bits 3-4: active video memory?, bit 7: use 2Mb */
  503.     0x00,0x00,
  504.     0x00,0x00,0x00,0x00,0xd8,0x00,0x00,0x01,0x00,0x2b,0x2f,0x30,
  505.     0x16,    /* (0x1e) dot clock */
  506.     0x1c,
  507.     0xe5    /* Hicolor DAC */
  508. };
  509.  
  510. #define g320x200x64K_regs  g320x200x32K_regs
  511. #define g640x480x64K_regs  g640x480x32K_regs
  512. #define g800x600x64K_regs  g800x600x32K_regs
  513. #define g1024x768x64K_regs g1024x768x32K_regs
  514.  
  515.  
  516. /* 1280x1024x256, 60 Hz */
  517. /* Uses special multiplexing mode on the 5434. */
  518. /* More registers, different format. */
  519. static const unsigned char g1280x1024x256_regs543x[] = {
  520.     /* CRTC */
  521.     0x63,0x4f,0x50,0x9a,0x53,0x1e,0x15,0xb2,0x00,0x60,0x00,0x00,
  522.     0x00,0x00,0x00,0x00,0x04,0x88,0xff,0xa0,0x00,0x00,0x12,0xe7,
  523.     /* ATC */
  524.     0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,
  525.     0x0C,0x0D,0x0E,0x0F,0x41,0x00,0x0F,0x00,0x00,
  526.     /* Graphics */
  527.     0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff,
  528.     /* Sequencer */
  529.     0x03,0x01,0x0f,0x00,0x0e,
  530.     /* Misc. Output */
  531.     0xef,
  532.     /* Hidden DAC */
  533.     0x4a,
  534.     /* Extended Sequencer */
  535.     0x0f,0x12,0x07,0x00,0x68,0x33,0x4a,0x5b,0x42,0x53,0x3d,0x00,
  536.     0x00,0x00,0x00,0x00,0x73,0x78,0x31,0x00,0x01,0x00,0x2b,0x2f,
  537.     0x1f,0x16,0x1c,
  538.     /* Extended CRTC */
  539.     0xff,0x00,0x00,0x22,0x00,0x00,0x21,0x20,0x1f,0x1e,0x07,0x00,
  540.     0x00,0x26,0x20,
  541.     /* Extended Graphics */
  542.     0x00,0x00,0x20,0xff,0x00
  543. };
  544.  
  545.