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- From: sakaria@vipunen.hut.fi (Sakari Aaltonen)
- Subject: Re: 68000 and Cache?
- Message-ID: <1992Nov12.222122.12200@nntp.hut.fi>
- Keywords: 68000
- Sender: usenet@nntp.hut.fi (Usenet pseudouser id)
- Nntp-Posting-Host: vipunen.hut.fi
- Reply-To: sakaria@vipunen.hut.fi (Sakari Aaltonen)
- Organization: Helsinki University of Technology
- References: <1992Nov6.225506.1973@nntp.hut.fi> <1dnt1fINNk0f@uranium.sto.pdb.sni.de>
- Date: Thu, 12 Nov 1992 22:21:22 GMT
- Lines: 16
-
- In article <1dnt1fINNk0f@uranium.sto.pdb.sni.de> Josef Moellers <mollers.pad@sni.de> writes:
- >........................
- >You don't need any provisions for a cache, i.e. none in particular.
- >All You need is a means to temporarily suspend operation of the CPU
- >while You process a cache miss.
- >........................
-
- Yeah, well, I do know in a general way how caches operate. What I
- don't know is how they are implemented with a 68000. What kind of
- hardware will do the job, that sort of thing. Are any IC's available
- for the purpose, for example? What do the accelerators use? I've
- never seen one...
- --
- -----------------------------------------------------------------------------
- Sakari Aaltonen Helsinki University of Technology
- Email: sakaria@vipunen.hut.fi ---- Finns Do It in the Snow ----
-