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- From: billw@regal.cisco.com (William )
- Newsgroups: sci.electronics
- Subject: Re: Idea for LED sequencer
- Date: 4 Nov 92 22:31:43
- Organization: cisco Systems, Inc.
- Lines: 154
- Message-ID: <BILLW.92Nov4223143@regal.cisco.com>
- References: <1992Nov3.094923.44351@kuhub.cc.ukans.edu> <2789@tau-ceti.isc-br.com>
- NNTP-Posting-Host: regal.cisco.com
- In-reply-to: jimc@tau-ceti.isc-br.com's message of 3 Nov 92 22:25:31 GMT
-
- Just for kicks, here are some PAL equations to implement a very flexible
- chaser light thing using a 16r8 PAL (be sure and use the really fast 7.5nS
- version of the PAL for fastest blinking :-) (Note, nearly all the other
- solutions describe are probably cheaper, easier to get parts for, and easier
- to implement. This one does do more different patterns though...)
-
- ed ecTITLE LED BLINKER SHIFTER THINGY
- PATTERN SHIFTER.PDS
- REVISION 1
- AUTHOR Bill Westfield
- COMPANY Nuts and Bolts Software
- DATE 1/19/89
-
- CHIP U1 PAL16R8
- ; Pins:
- CK /ROT /CMP8 /CMP6 /CMP4 /CMP2 /I6 /I7 INIT GND
- /OE /Q1 /Q2 /Q3 /Q4 /Q5 /Q6 /Q7 /Q8 VCC
-
- EQUATIONS
-
- Q1 := Q8 * ROT ; maybe shift in MSB for rotate
- + /Q8 * CMP8 ; Shift in complement of msb (alternating 1s and 0s)
- + /Q6 * CMP6 ; other patterns based on complementing some bit
- + /Q4 * CMP4
- + /Q2 * CMP2
- + INIT
- + /Q1 * /Q2 * /Q3 * /Q4 * /Q5 * /Q6 * /Q7 * /Q8 ; always supply 1 bit
-
- Q2 := Q1 ; Shift Left
- + INIT
-
- Q3 := Q2 ; Shift Left
- + INIT
-
- Q4 := Q3 ; Shift Left
- + INIT
-
- Q5 := Q4 ; Shift Left
- + INIT
-
- Q6 := Q5 ; Shift Left
- + INIT
-
- Q7 := Q6 ; Shift Left
- + INIT
-
- Q8 := Q7 ; shift Left
- + INIT
-
- SIMULATION
-
- PRLDF /Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
- SETF ROT /CMP8 /CMP6 /CMP4 /CMP2 /INIT
- TRACE_ON INIT /Q1 /Q2 /Q3 /Q4 /Q5 /Q6 /Q7 /Q8
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
-
- SETF ROT /CMP8 /CMP6 /CMP4 /CMP2 INIT
- CLOCKF CK
- SETF /ROT CMP8 /CMP6 /CMP4 /CMP2 /INIT
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
-
- SETF ROT /CMP8 /CMP6 /CMP4 /CMP2 INIT
- CLOCKF CK
- SETF /ROT /CMP8 CMP6 /CMP4 /CMP2 /INIT
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
-
- SETF ROT /CMP8 /CMP6 /CMP4 /CMP2 INIT
- CLOCKF CK
- SETF /ROT /CMP8 /CMP6 CMP4 /CMP2 /INIT
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
-
- SETF ROT /CMP8 /CMP6 /CMP4 /CMP2 INIT
- CLOCKF CK
- SETF /ROT /CMP8 /CMP6 /CMP4 CMP2 /INIT
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
- CLOCKF CK
-
- TRACE_OFF
-
-
-