home *** CD-ROM | disk | FTP | other *** search
- Path: sparky!uunet!dtix!darwin.sura.net!haven.umd.edu!wam.umd.edu!rsrodger
- From: rsrodger@wam.umd.edu (Yamanari)
- Newsgroups: comp.sys.next.hardware
- Subject: Re: Acorn 610 as processor/coprocessor?
- Message-ID: <1992Nov12.134146.631@wam.umd.edu>
- Date: 12 Nov 92 13:41:46 GMT
- References: <1992Nov8.130614.19372@wam.umd.edu> <BxL7t4.3tE@iat.holonet.net>
- Sender: usenet@wam.umd.edu (USENET News system)
- Organization: University of Maryland, College Park
- Lines: 31
- Nntp-Posting-Host: rac1.wam.umd.edu
-
- In article <BxL7t4.3tE@iat.holonet.net> bwilliam@iat.holonet.net (Bill Williams) writes:
- >It has only 32000 transistors yet can magically support 4096 bytes of
- >cache RAM in the 32000 transistors... hmmm lets see... lets pretend that
- >each bit of cache was magically stored in exactly 1 transistor each
- >without requiring the other 6 transistors I mentioned earlier....
-
-
- I was referring to the Byte magazine article some months
- back. 32k transistors, 4k cache and no FPU.
-
- Can anyone cite a claim from Acorn themselves??
-
-
-
- >SOMEONE OUT THERE IS A LIAR!!!! I assume the liar is Acorn, and that the
- >chip has 500,000 transistors and not the 32000 transistors claimed.
-
-
- I doubt it has much more than they claim, after all-that would
- be hard to pass off, wouldn't it?
-
- However, I might be willing to venture a guess that the cache
- and cache-control silicon is off chip..?
-
-
-
- --
- Robert Stephen Rodgers || rsrodger@wam.umd.edu || IRC: Yamanari
- --------NeXTmail-preferred!!--------------------------------------
- Snout: O Bottom, thou art chang'd! What do I see on thee?
- Bottom: What do you see? You see an ass-head of your own, do you?
-