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- Path: sparky!uunet!charon.amdahl.com!pacbell.com!decwrl!concert!rutgers!cbmvax!grr
- From: grr@cbmvax.commodore.com (George Robbins)
- Newsgroups: comp.sys.amiga.hardware
- Subject: Re: 14.xx & 7.xx Mhz, why?
- Keywords: 68000
- Message-ID: <36751@cbmvax.commodore.com>
- Date: 6 Nov 92 05:08:30 GMT
- References: <1992Nov5.224246.25432@ifi.uio.no>
- Reply-To: grr@cbmvax.commodore.com (George Robbins)
- Organization: Commodore, West Chester, PA
- Lines: 22
-
- In article <1992Nov5.224246.25432@ifi.uio.no> stigo@ifi.uio.no (Stig Arne Olsen) writes:
- >
- > Can some guru :-) here tell me why C= are clocking the processors below what
- > they were made for? They do not seem to do it with the faster processors,
- > but why are the Mc68000 just 7 and Mc68020 in the A1200 14Mhz? Has it something
- > to do with dma-cycle timing? And why are the 68030 in the A3000 running at the
- > full 25Mhz, if this is a problem?
-
- In the A500/A2000/etc, the processor runs off a clock that is synchronous
- with the Amiga chipset clocking. In NTSC units, this clock is some multiple
- of the 3.58 MHz NTSC color burst frequency, which makes for stable composite
- video output. In PAL systems the clock is some multiple of 4/5's of the PAL
- 4.43 MHz color burst frequency, these two numbers being less than 1% different.
-
- In the A3000/A4000 systems, the processor runs on an asynchronous clock and
- additional logic and address/data latching is needed to interface to the
- chip bus and expansion bus.
-
- --
- George Robbins - now working for, work: to be avoided at all costs...
- but no way officially representing: uucp: {uunet|pyramid|rutgers}!cbmvax!grr
- Commodore, Engineering Department domain: grr@cbmvax.commodore.com
-