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- From: torbenm@diku.dk (Torben AEgidius Mogensen)
- Newsgroups: comp.sys.acorn.tech
- Subject: Re: ARMXX & MHz
- Message-ID: <1992Nov13.163340.16195@odin.diku.dk>
- Date: 13 Nov 92 16:33:40 GMT
- References: <BxntqI.1Io@brunel.ac.uk>
- Sender: torbenm@freke.diku.dk
- Organization: Department of Computer Science, U of Copenhagen
- Lines: 62
-
- cs89jmb@brunel.ac.uk (Aeon Flux) writes:
-
-
- >Salutations,
-
- >Not being a real techy I was pondering this question last night and wondering
- >why I couldn't come up with an answer.
-
- >An Arm2 runs at 8Mhz and has approx "mippage" of 4
- >An Arm3 runs at 26Mhz and has approx "mippage" of 13
-
- >Rumour has it that the next ArmX chip runs at 50Mhz and has approx mippage of
- >28
-
- >Now then, what I don't understand is the Arm3 has a 4k cache which helps to
- >speed things up, right?
- >The Arm3 (most common ones) are approx 3 times faster than an Arm2 - is this
- >because they are clocked 3 times faster?
-
- Basically, yes.
-
- >If so, where does the cache help?
-
- If you run an 26MHz ARM3 from 8MHz memory, it can't get its
- instructions fast enough to run at the full 26MHz. If the instructions
- happen to be in the cache (which runs at the same speed as the
- processor) it can run these at full speed. The cache also helps on
- loads, if the value to be loaded happens to be in the cache. On the
- ARM3 the cache doesn't help on stores - these are still written to
- main memory. On the ARM600/ARM610 a write buffer makes the processor
- able to continue with the next instruction before a store is
- completed.
-
- On the A5000 and A4 the main memory is 12MHz, which helps on memory
- accesses that doesn't use the cache. Thus the A5000 is faster than an
- A300/A400 with ARM3 added, though the difference is not so great as
- between ARM2s running from 8 or 12MHz memory (like the new A3010
- etc.).
-
- I expect the ARM700 (or whatever) to have a write buffer similar to
- the A600, and I expect it to run at better than 30MHz. 50MHz is
- possible - it mainly comes down to fabrication techology, and some of
- the current manufacturers of ARM chips should have the necessary
- technology. It may make the chips more expensive, so maybe only the
- high end machines will run at this speed.
-
- A more important question is what MEMC it is going to use. The MEMC1a
- is too limited in the amount of memory at can address. The ARM600 has
- a built-in MEMC that is capable of addressing all the memory you are
- likely to want to put on an ARM based computer, but it also has
- several other advanced features which assists protection and garbage
- collection, features which RISC OS is not likely to be able to use,
- and RISCix neither. So maybe we will see a MEMC with a similar
- translation table structure as on the ARM600, but with a simpler
- protection scheme (similar to that of MEMC1a).
-
- A machine using 50MHz ARM700, a good MEMC, VIDC20, an FPU (which
- should be just about ready) and simple memory extension up to or above
- 128MB will be quite impressive, but also somewhat more expensive than
- even the A540 is today.
-
- Torben Mogensen (torbenm@diku.dk)
-