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- Path: sparky!uunet!pipex!warwick!nott-cs!ucl-cs!news
- From: M.Nigri@cs.ucl.ac.uk (Meyer E. Nigri)
- Newsgroups: comp.lsi
- Subject: Subset of VHDL for synthesis.
- Message-ID: <3201@ucl-cs.uucp>
- Date: 9 Nov 92 12:27:19 GMT
- Sender: news@cs.ucl.ac.uk
- Lines: 26
-
-
- Dear all,
-
- I would like to know the present state regarding a formal definition
- for a subset of VHDL aiming at synthesis.
-
- I believe there is a group (VHDL Synthesis Working Group in Europe???) that
- is trying to specify this subset.
-
- Does anybody know how I can get info on this subject?
-
- Thanks a lot,
-
- Meyer.
-
- PS: I will summarise to the group the responses I get on this
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- |Meyer Elias Nigri | JANET:mnigri@uk.ac.ucl.cs |
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