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  1. Xref: sparky comp.lang.verilog:421 comp.lang.vhdl:530 comp.parallel:2517
  2. Path: sparky!uunet!ogicse!emory!swrinde!gatech!hubcap!fpst
  3. From: tsai@hal.com (Finnegan T. Tsai)
  4. Newsgroups: comp.lang.verilog,comp.lang.vhdl,comp.parallel
  5. Subject: Wanted: Informations on parallel VHDL/Verilog Simulators
  6. Keywords: parallel processing, VHDL, Verilog, Logic Simulator
  7. Message-ID: <1992Nov12.200836.8991@hubcap.clemson.edu>
  8. Date: 12 Nov 92 19:58:54 GMT
  9. Article-I.D.: hubcap.1992Nov12.200836.8991
  10. Sender: fpst@hubcap.clemson.edu (Steve Stevenson)
  11. Organization: HaL Computer Systems
  12. Lines: 12
  13. Approved: parallel@hubcap.clemson.edu
  14. Nntp-Posting-Host: molly.hal.com
  15.  
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  18. Hi, Experts
  19.  
  20.  
  21. I am trying to gather any informations related to event-driven 
  22. parallel VHDL or Verilog simulators. Would you please help me?
  23. Any clues to papers or academic researches are highly appreciated.
  24.  
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  26.  
  27. Desperately Finney
  28.