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- Path: sparky!uunet!pipex!unipalm!uknet!keele!nott-cs!ucl-cs!news
- From: J.Dzikowski@cs.ucl.ac.uk (Jens-Uwe Dzikowski)
- Newsgroups: comp.lang.verilog
- Subject: Tasks & Libraries
- Message-ID: <3186@ucl-cs.uucp>
- Date: 5 Nov 92 15:28:22 GMT
- Sender: news@cs.ucl.ac.uk
- Lines: 23
-
- Hi verilog experts,
-
- I've got a question:
-
- Is there any possibility to store tasks in libraries?
- There seems to bee no related information in the manuals. They only
- talk about modules and UDPs.
-
- Has anyone got another(better) idea how to include large blocks of
- frequent assignments in a modular way without having to pass hundreds
- of parameters ?
-
- Thanks
-
- Jens
-
- --------------------------------------------------------------------
- Jens-Uwe Dzikowski
- Dept. of Computer Science
- University College London tel. : +44-71-3877050 ext.3701
- Gower Street fax : +44-71-3871397
- London WC1E 6BT email: dziko@uk.ac.ucl.cs
- --------------------------------------------------------------------
-