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- Path: sparky!uunet!mcsun!sunic!dkuug!diku!torbenm
- From: torbenm@diku.dk (Torben AEgidius Mogensen)
- Newsgroups: comp.arch
- Subject: Re: 600 transistor CPU (was: MINIMUM instruction set)
- Message-ID: <1992Nov13.104602.10923@odin.diku.dk>
- Date: 13 Nov 92 10:46:02 GMT
- References: <1992Nov10.235849.19192@fcom.cc.utah.edu> <1992Nov11.144304.10494@news.uiowa.edu> <1992Nov12.164510.28248@dartvax.dartmouth.edu> <1992Nov12.220301.23915@fcom.cc.utah.edu>
- Sender: torbenm@freke.diku.dk
- Organization: Department of Computer Science, U of Copenhagen
- Lines: 13
-
- caperkin@ursa11.law.utah.edu (Charles Perkins) writes:
-
- >This caught my attention because of an idea I have been toying with, which
- >I have decided to call the Fractal Logic Asynchronous Scalable Circuit.
- >(Basically a 'memory' where every cell is a finite state autonoma 'conversing'
- >with the cells next to it.) I figure eight thousand of the little guys on a
- >chip, simple though they might be individually, could get some serious
- >computation done.
-
- Have you considered how to program such a beast? And on the hardware
- side, how do you load a program?
-
- Torben Mogensen (torbenm@diku.dk)
-