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- From: peter@ferranti.com (peter da silva)
- Subject: Re: What's RIGHT with stack machines
- Message-ID: <id.Z9WU.QA1@ferranti.com>
- Organization: Xenix Support, FICC
- References: <MIKE.92Nov9004026@guam.vlsivie.tuwien.ac.at> <id.D6UU.5Z@ferranti.com> <lg0eheINNs7l@exodus.Eng.Sun.COM>
- Date: Wed, 11 Nov 1992 16:19:14 GMT
- Lines: 16
-
- In article <lg0eheINNs7l@exodus.Eng.Sun.COM> chased@rbbb.Eng.Sun.COM (David Chase) writes:
- > On the other hand, if what you are optimizing is ROM usage,
- > high-performance commodity micros might just run little byte-code
- > interpreters. Of course, one trick to making your interpreted code
- > run faster is to compile little fragments, which is sort of a
- > generalization of scheduling at run-time.
-
- Of course, superscalar RISC machines with lots of pipelines are really terrible
- at handling byte-code interpreters (lots of non-predictable branches) and run-
- time code generation (OK, now we blow away the pipeline...). Oh, and the
- infamous autoincrement deferred addressing mode becomes a major win...
- --
- Peter da Silva / 77487-5012 USA / +1 713 274 5180
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