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- Path: sparky!uunet!munnari.oz.au!uniwa!john
- From: john@gu.uwa.edu.au (John West)
- Newsgroups: comp.arch
- Subject: Re: Integers implementation
- Date: 8 Nov 1992 05:42:08 GMT
- Organization: The University of Western Australia
- Lines: 35
- Message-ID: <1di9bgINNhia@uniwa.uwa.edu.au>
- References: <1992Nov6.144502.17520@osf.org> <BxAxxo.4B2@mentor.cc.purdue.edu>
- NNTP-Posting-Host: mackerel.gu.uwa.edu.au
-
- hrubin@pop.stat.purdue.edu (Herman Rubin) writes:
-
- >>Most of today architecture use 2's complement scheme to represent
- >>signed integers. About other possibilities, like 1's complement,
- >>I have the following questions:
-
- >> - What are their advantges ?
- >> - What are their drawbacks ?
- >> - Are they usefull for any given set of aplications ?
- >> - Are they likely to pop-up in future processor design ?
-
- Well... its considerably easier to look to the past. The PDP-1 was a
- 1s complement machine. I'm sure there were others.
-
- >For 2's complement, the advantages are simplicity of multiple-precision,
- >and this can take many forms, including size expansion, and the fact that
- >there is only one 0. This last is a real problem for the others.
-
- Also, the circuits for addition are a lot saner. I don't know of any nice
- way of adding 1s complement or sign-magnitude.
-
- >The alternatives I have seen are 1's complement and sign-magnitude. The
- >advantages are that negation is very much simpler, as is absolute value.
- >Since the negative of a negative number is always positive, it does not
- >have the problem which 2-s complement machines have, that the negative
- >of the most negative number comes out negative.
-
- But then there are 2 0s. This can make life unpleasant.
-
- Of course, it is not inconcievable that some application will pop up just
- begging for 1s complement.
-
- John West
- --
- For the humour impaired: Insert a :-) after every third word
-