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- From: RAUDETTE@VM1.ULAVAL.CA (Rodolphe Audette)
- Newsgroups: bit.listserv.ibm-main
- Subject: Re: STORAGE BELOW 16M LINE
- Message-ID: <IBM-MAIN%92111211552192@VM1.CC.UAKRON.EDU>
- Date: 12 Nov 92 23:12:43 GMT
- Sender: IBM Mainframe Discussion list <IBM-MAIN@RICEVM1.BITNET>
- Lines: 22
- Comments: Gated by NETNEWS@AUVM.AMERICAN.EDU
- In-Reply-To: Message of Thu, 12 Nov 1992 01:36:00 PST from <LDW@USCMVSA>
-
-
- MVS actually uses a PSA other than absolute page 0 even when running
- in a uniprocessor. I think one reason is that some permanently assigned
- locations in ABSOLUTE storage coincide with some permanently assigned
- locations in REAL storage. For example, absolute locations 384-447 are
- assigned to the general-register save area during the store-status
- operation, while real locations 384-447 are assigned to the
- general-register save area during a machine check interruption. So if
- the store-status operation is executed prior to an IPL for a stand-alone
- dump, the store-status registers will overlay the machine-check
- registers, unless they are assigned different save areas by means of
- prefixing.
-
- I think (but I'm not sure) that another reason for prefixing is that
- a uniprocessor can suddenly become a multiprocessor if a processor is
- varied online after IPL. I know MVS can sometimes determine, depending
- on the model, that a uniprocessor just can't become a multiprocessor,
- but why make special cases?
-
- Rodolphe Audette
- Laval University
- Quebec City
-