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- Path: sparky!uunet!wupost!sdd.hp.com!think.com!eplunix!raoul
- From: raoul@eplunix.UUCP (Nico Garcia)
- Newsgroups: sci.electronics
- Subject: Re: BCD-binary conversion
- Message-ID: <1273@eplunix.UUCP>
- Date: 13 Sep 92 16:31:02 GMT
- References: <1272@eplunix.UUCP> <1992Sep12.150251.1@research.ptt.nl>
- Organization: Eaton-Peabody Lab, Boston, MA
- Lines: 33
-
- In article <1992Sep12.150251.1@research.ptt.nl>, walvdrk_r@research.ptt.nl (Kees van der Wal) writes:
- > In article <1272@eplunix.UUCP>, raoul@eplunix.UUCP (Nico Garcia) writes:
- > Five decades would be tricky as the maximum of (decimal) 99999 exceeds the
- > 16-bit limit.
-
- Yup. Turns out I can get away with 4, which is good.
-
- > A standard approach uses a large number of Full Adders where e.g. the ouputs of
- >
- > Is that the approach that leads to 11 chips?
-
- No, there is a clever approach that stacks single or double decade decoders
- in series to do the conversion. It's in the old TI databooks under '184 and
- '484 application notes.
-
- > With 4 decades there's 4*4=16 inputs and 16 bits of output such it could be
- > done by taking two standard 64KB EPROMs. Writing a program for the code in the
- > EPROMs is rather straightforward.
-
- True. I didn't have anything to program EPROM's that large or a supply of
- them that large. Functional. Also, 4 decades of input only comes to about
- 14 bits of output ( 0-9999 decimal is less than 2^14 or 16K ). It doesn't
- help much, but it doesn't hurt.
-
- I've gotten several approaches sent to me: I'll post a note on the one I
- use. I was avoiding microcomputer solutions primarily because this is for a
- mixed high-speed semi-analog design: the less digital circuitry, the less
- potential trouble to deal with. That's only a *desire*, not an absolute
- limitation, though.
- --
- Nico Garcia
- CIRL/MEEI
- eddie.mit.edu!eplunix!raoul
-