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- Path: sparky!uunet!ogicse!usenet.coe.montana.edu!uakari.primate.wisc.edu!ames!agate!iat.holonet.net!bwilliam
- From: bwilliam@iat.holonet.net (Bill Williams)
- Newsgroups: comp.sys.next.hardware
- Subject: Re: Terrible SCSI Transfer
- Message-ID: <Bu5vq5.3wF@iat.holonet.net>
- Date: 6 Sep 92 14:46:52 GMT
- Article-I.D.: iat.Bu5vq5.3wF
- References: <1992Sep1.010514.432@leland.Stanford.EDU>
- Distribution: usa
- Organization: HoloNet (BBS: 510-704-1058)
- Lines: 46
-
- > These generate a lot of interrupts for each SCSI transaction
-
- I Believe that NO COMPUTER could efficiently use individual interrupts
- during the data tranfer phase of a SCSI transaction. For example, though
- using an interrupt driven buffer for ASYNCHRONOUS I/O might sound like a
- good idea, it is much more likely that trying to get a NeXT or a Mac
- Quadra 950 to handle over three million interrupts per second would
- be ludicrous.
-
- Therefore what the computers probably REALLY do is POLL.
-
- The Macintosh, for example, locks up into a tight loop during a data
- transfer phase and polls a register of the 53C90A until timeout failure
- watchdog intervenes or until expected logical data block size is
- reached.
-
- Polling does indeed tie up the CPU dramatically on computers that use the
- primary system CPU to perform the polling of the SCSI interface chip
- directly (for each byte)... I don't think NeXT computers even do that.
- For example, I think the DMA services on the NeXT with the "Generic"
- user accessable SCSI Driver (Slow) do not use the system CPU to POLL.
-
- PS The main advantages of a NCR53720 or NCR53710 chip (according to
- the preface of the NCR53720 programming applications guide) is TO
- SIMPLIFY THE INTERFACE TO THE SCSI PROTOCOL CHIP. For example a
- complete plain vanilla SCSI manager (not driver) can be written with
- only 400 NCR opcodes (actually a special meta-language with a NCR
- SCSI command compiler)... BUT A OLD STYLE 53C90 CHIP IS A STATE MACHINE
- REQUIRING PINBALL LOGIC RESULTING IN OVER 4,000 opcodes minimum.
-
- I am assuming that in my definition of usage asynchronous, narrow (8
- bit) data is being used. Obviously a NCR53720 with "fictional"
- 32 bit wide synchronous data from an array server approaching
- TWENTY MEG PER SECOND is a clear benefit of of a 720 chip.
-
- The NeXT is fine. Quite bellyaching about SCSI Transfer when you
- probably don't have either:
-
- (1) a SCSI Network
- (2) a SCSI Device containing an array of devices
- (3) a SCSI solid state storage device
- (4) a application on a NeXT capable of RAID striping across devices
-
- If you do, fine, go ahead and complain.
-
- BWilliams (My first Internet post in my life!)
-