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- Path: sparky!uunet!zaphod.mps.ohio-state.edu!darwin.sura.net!udel!gvls1!faatcrl!iecc!compilers-sender
- From: phil@icarus.weber.edu (Phillip Neiswanger)
- Newsgroups: comp.compilers
- Subject: Register Allocation for Z80000...
- Keywords: registers, optimize
- Message-ID: <92-09-055@comp.compilers>
- Date: 9 Sep 92 03:13:33 GMT
- Sender: compilers-sender@iecc.cambridge.ma.us
- Reply-To: phil@icarus.weber.edu (Phillip Neiswanger)
- Organization: Compilers Central
- Lines: 17
- Approved: compilers@iecc.cambridge.ma.us
-
- Hi,
-
- I'm interested in determining the affects of the Z80000 register
- architecture on compiler register allocation routines. I read somewhere
- that the Z80000 register architecture made it more difficult for register
- allocation routines to allocate registers efficiently. Are there any
- people out there who have had experience with the Z80000, or have any
- papers concerning register allocation been written about the Z80000.
-
- Thanks for your time. Email responses would be prefered.
-
- Phil
- email: phil@csulx.weber.edu
- phil@icarus.weber.edu
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