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- Path: sparky!uunet!sun-barr!ames!purdue!mentor.cc.purdue.edu!hrubin
- From: hrubin@mentor.cc.purdue.edu (Rubin Herman)
- Newsgroups: comp.arch
- Subject: Re: Not using integers
- Message-ID: <BuBB0L.MDD@mentor.cc.purdue.edu>
- Date: 9 Sep 92 13:05:09 GMT
- References: <1992Sep8.182423.26063@athena.mit.edu>
- Organization: Purdue University Statistics Department
- Lines: 29
-
- In article <1992Sep8.182423.26063@athena.mit.edu> solman@athena.mit.edu (Jason W Solinsky) writes:
- >Does anybody here know of any microprocessors which did not use any integer
- >units or registers, but instead modified the floating point execution units
- >to inhibit the normalization pipe stage whenever an "integer" flag within
- >the instruction was set.
-
- >The idea is to use this feature for a huge savings in area in processors which
- >are intended primarilly for FP operation but must still have good integer
- >performance.
-
- I do not know about any micros in this category, but there are mainframes.
- The CDC 6x00 series and its successors did have integer addition and
- subtraction, but multiplication was done in the floating unit. The
- Crays are somewhat similar, but have a rather odd integer multiply.
- These machines do have integer registers, however, essentially usable
- only for indexing.
-
- The Cyber 205, etc., has no separate integer registers. There is one
- additional addition and one additional subtraction for address arithmetic,
- which cause the right 48 bits to be handled in normal 2's complement
- form. Since unnormalized arithmetic is supported, and exponents are
- handled without bias, this provides effectively for 24 and 48 bit integers.
- Double precision is reasonably handled, so that 47+sign x 47+sign ->
- 94+sign is no problem.
- --
- Herman Rubin, Dept. of Statistics, Purdue Univ., West Lafayette IN47907-1399
- Phone: (317)494-6054
- hrubin@snap.stat.purdue.edu (Internet, bitnet)
- {purdue,pur-ee}!snap.stat!hrubin(UUCP)
-