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- Path: sparky!uunet!pipex!warwick!uknet!keele!phd85
- From: phd85@seq1.keele.ac.uk (D.H. Holden)
- Newsgroups: comp.arch
- Subject: Re: CPU and speed question
- Keywords: thanks
- Message-ID: <4034@keele.keele.ac.uk>
- Date: 8 Sep 92 11:31:13 GMT
- Organization: University of Keele, England
- Lines: 163
-
-
- In article <4028@keele.keele.ac.uk>
-
-
- i wrote an article asking
- about worksations and PC and CPU speed, I'd like to thanks every
- one who replied ( much too many to list!!)
- I have a slight dilemma as to how to summarise the answers,
- All were thoroughly informative and helpful, and i'll be checking
- out some of the recommended books, the problem being that quite a
- few were from people working with companies who produces or use the
- chips mentioned , each giving their own somewhat wry :) comments on competitor
- offerings, quite amusing. As im not a computer professional i'm not
- really qualified to pick out individual pieces of advice and
- summarise therfore
- i'm posting the following reply as the one that gave the most
- numbers!!
-
- P.s. to Robert Block, sorry Robert but my mailing program didn't
- recognise the address you gave so I could not reply. Sorry.
-
- In comp.arch you write:
- > Hi,
- > I was wondering if any one could resolve my confusion,
- > what is it that makes a workstation faster than a PC
- > apart from the operating system.
-
- The Operating System actually doesn't make the machine faster (well,
- I suppose it could, but it doesn't necessarily), but offers more features
- to the user, so they don't have to acquire application programs to do what
- (IMHO) the OS should be doing.
-
- In a nutshell, it's faster because the people who buy them want more
- speed, so they'll pay more. Exactly like supercomputers. Take, for
- example, the system bus. PC's have a bus going about 10 Megabits per
- second, with IBM's MicroChannel Turbo whizzing along at 30. The Sun
- Sparcstation 1 uses SBus for cumminication between peripherals, which
- starts at 80 MBits/second. The old Sparc 3's used a VME bus, running at
- 28 Mb/second. That's for peripherals. What PC's are discovering -- a
- local bus, is nice to have to communicate between CPU, memory, and video.
- On the workstation side, it's used for communication between multiple
- CPUs. Sun's MBus operates at about 300 MBits/second, SGI's at over 500.
- Sun has something called XBus, designed by Xerox, which is supposed to be
- used for a single bus handling ~64 CPUs. I assume it's extremely fast.
-
- Of course, all this costs money, which is why it shows up in $10,000+
- workstations first. But then look at some of the supercomputer stuff,
- where HIPPI channels to the disks run at 800 MBits/second, and God knows
- what their internal busses run at. Very bloody fast, and very bloody
- expensive I'm sure.
-
-
- > Because I've just read a article about a PC with a
- > 50Mhz clock, would this be faster than say a sun
- > workstation with 25mhz clock?
-
- Again, to sum up the argument, clock speed only matters between the
- same design. Actually, it does have _some_ bearing, but you can't say
- that a 25MHz 486 is necessarily faster than a 25MHz 68040. They're
- completely different designs. And a SPARC chip is even more different.
- At the same clock speed, your SPARC will run circles around the 486
- _for_certain_operations_. For other operations (string stuff would be
- likely) the 486 would win. The point of the SPARC design (as in all
- RISC design) is to optimize those operations you consider most likely.
-
- Let's take a look at the SPEC92 numbers for a 50 MHz 486, a 25 MHz
- SPARC, a 40 MHz SPARC, and a 40 MHz SuperSparc (TI Viking). Be aware
- that the SPARC systems are more expensive, but they also have quite a
- few bells and whistles that you don't get (or can't get) on the Intel
- box.
-
- Designer Chip Speed Spec92Int Spec92FP MFlops
- -------- -------- ------- ---------- --------- ---------
- Intel 486 50 30.1 14.0 3.0 (A 486/33 got 1.4)
- Cypress SPARC 25 13.8 11.1 1.8
- Cypress SPARC 40 21.8 22.8 4.0
- TI SPARCv8 40 52.6 64.7 17.2
-
- Hmm. The Cypress SPARC (v7) and the SuperSparc are running at the
- same clock rate (40 MHz), but the SuperSparc is quite a bit faster.
- The SuperSparc happens to be a superscalar design, capable of executing
- 3 instructions every clock cycle. Advances in technology.. The 40
- MHz Cypress Sparc beats the 486 running at 50 MHz in floating point.
- FP is important to a lot of workstation buyers (such as ourselves), and
- even twice the 486 isn't enough for our purposes. BTW, just so you
- don't believe PC Week, or Everex ads, the Cray X/MP runs at 184 MFlops,
- and the Y/MP C90/16 at 9715. Even the old Cray XMS (running at 18 MHz)
- gets 34 MFlops.
- [These numbers are from Dongarra's Summary of Linpack numbers from netlib]
-
- BTW, Intel says the P5 will be twice as fast as the 486. Draw your
- own conclusions as to it's impact on workstation buyers from the above
- numbers.
-
- > I also read that dec are bringing out a new chip
- > that can manage 200Mhz, is'nt this a massive jump
- > from current chips, I thought the fastest intel chip
- > only did 66Mhz.
-
- One could make the analagy of Clock speed in computers to HorsePower
- in cars. The more HP, the faster, in general, and within a design, it
- is almost always true, but there are an awful lot of other things to
- consider. The Yugo with 1000 Horsepower is going to spin those little
- tires around and make an impressive amount of noise, but the 200 HP
- NSX is going to win the race. Of course, DEC doesn't make Yugos...
- (they make diesel Mercedes! :-)
-
- 200 MHz is impressive. They can take 4 cycles to do an operation that
- would take a 50MHz machine 1 cycle, and achieve a result in the same
- time. There are some problems with running at that speed however. Power
- dissipation is one -- there's a reason supercomputers have air-
- conditioners! (The Cray Y/MP runs at 240 MHz, the NEC SX-3 at 344) I
- heard from someone who saw a pre-release Alpha workstation that it had
- warped the case above the chip (I think it puts out in excess of 20 watts
- which is plenty hot!). DEC says they'll solve this problem, of which I
- have no doubt, but there are others. It'll be a nice addition to the
- field however. Hopefully it'll get the other manufacturers moving!
-
- Looking at the latencies and throughputs for some basic operations,
- one can see some interesting things going on. The 88110 and SuperSPARC
- are running at 40 MHz, and should be at 50 or above by the time Alpha
- sees market. This leaves Alpha running at 3-4 times faster than the
- others, depending on which version.
- The first number is when the chip will accept more input (they're all
- capable of handling multiple instructions at a time), and the second
- number is when the answer comes back. The 88110 and Alpha are 2-scalar,
- so they can do 2 at a time, the SuperSparc 3-scalar, so it can run
- three operations at a time. Each has different combinations it allows.
-
- Operation Moto 88110 TI SuperSPARC DEC Alpha
-
- Int add/sub 1/ 1 1/ 1 1/1-2
- Int mul 1/ 3 4/ 4 19-23/19-23
- Int div 18/ 18 18/ 18 ---
- FP add/sub 1/ 3 1/ 1 1/ 6
- FP mul 1/ 3 1/ 3 1/ 6
- FP div 13-26/23-26 6- 9/ 6- 9 30-63/30-63
- FP sqrt ??? 7-12/ 8-12 ???
-
- The Alpha doesn't have floating point divide, so it has to emulate it
- with multiply. This is what the old v7 SPARCs used to do. Wasn't it DEC
- who was one of the loudest to point this out as a deficiency? :-)
- So, on Int add and substract, the Alpha will blow by the others. On
- Int multiply and divide, and on FP divide, the other two will be _faster_,
- even with the Alpha chip running at 4 times the clock rate! For FP
- multiply, Alpha should be about twice as fast, and who knows about
- square root -- Sun/TI were the only ones to post this info.
-
- > Hope this is the right group to post this, comp.arch
- > sounded right,
-
- This, or comp.benchmarks, is certainly the right group.
-
- > cheers,
- > Dave
-
- Hope you survived my talking your ear off... You can post this in a
- summary if you want (I really hope the information is accurate! I'd
- like to know if it isn't).
- --
- Dana Jacobsen
- jacobsd@solar.cor2.epa.gov
- jacobsd@cs.orst.edu
-