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- From: davidsen@ariel.crd.GE.COM (william E Davidsen)
- Newsgroups: comp.sys.intel
- Subject: Re: 486 / 586(P5) Upgrade
- Message-ID: <1992Aug26.133224.1134@crd.ge.com>
- Date: 26 Aug 92 13:32:24 GMT
- References: <1992Aug24.013528.55@wsuhub.uc.twsu.edu>
- Sender: usenet@crd.ge.com (Required for NNTP)
- Reply-To: davidsen@crd.ge.com (bill davidsen)
- Organization: GE Corporate R&D Center, Schenectady NY
- Lines: 25
- Nntp-Posting-Host: ariel.crd.ge.com
-
- In article <1992Aug24.013528.55@wsuhub.uc.twsu.edu>, zxnoueih@wsuhub.uc.twsu.edu (...VALENCIA...) writes:
- | A question concerning 486 to 586 upgradability after reading
- | some of the replies: Are upgrades possible only on EISA based systems?
- | If yes, why? If no, then I guess it was a stupid question...:-)
-
- There's nothing inherent in the P5 (or any CPU) which needs EISA.
- Since the memory is on the motherboard on all modern systems, the bus
- handles i/o only. Now, as far as being plug-in replacements (pin
- compatible), I doubt it. There may be technical reasons, but the main
- reason is that Intel loves to use new pinouts, as they did on the 486SX.
-
- By doing this they require new board design, which raises the price,
- increases inventory, and ups the price to the consumer while delivering
- no added functionality. Did I mention that they don't really seem to
- care about public relations? If the 486SX had been pin compatible they
- could have claimed it was a more cost effective solution for those who
- don't need the FPU, and people would have had a good feeling toward them.
-
- I wonder if anyone at Intel sees a connection between the move to
- other vendors when possible and their packaging, pricing, and slipped
- delivery policies.
-
- --
- bill davidsen, GE Corp. R&D Center; Box 8; Schenectady NY 12345
- I admit that when I was in school I wrote COBOL. But I didn't compile.
-