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- Newsgroups: comp.sys.ibm.pc.hardware
- Path: sparky!uunet!sun-barr!ames!agate!iat.holonet.net!uupsi!psinntp!tandon!tdbear
- From: tdbear@tandon.com (Tom Barrett)
- Subject: Re: 486 external cache
- Message-ID: <1992Aug28.170834.11127@tandon.com>
- Organization: Tandon Corporation, Moorpark, CA
- References: <9208270241.AA29504@ucbvax.Berkeley.EDU>
- Date: Fri, 28 Aug 1992 17:08:34 GMT
- Lines: 23
-
- In article <9208270241.AA29504@ucbvax.Berkeley.EDU> JULIUS@BTVLABVM.VNET.IBM.COM ("Julius C. Chang") writes:
- >2-way
- >set associative organization (unlike the more common direct-mapped secondary
- >caches which are subject to "thrashing")
-
- All caches are subject to thrashing... it's just that 2-way
- caches are twice as likely NOT to thrash. It just depends on
- the data being accessed. Typically, if your data is MUCH
- larger than the cache, you will be thrashing all the time
- (like with huge spreadsheets)... that's when smarter caches
- are desirable which detect and adapt to changing data access
- patterns. Those type of caches have typically only been used
- in mainframes, but I'm sure we will see them in PCs pretty
- soon.
-
- As for the 16-byte line fills... most 486 caches have this
- feature and allow the 486 to burst the line.
-
- --
- Tom Barrett (TDBear) tdbear@tandon.com voice 805-378-6207
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- Sr. HW Design Engineer "War is Peace, No is Yes, And We're All Free!"
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