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- Path: sparky!uunet!mcsun!corton!chorus!opera.chorus.fr!mir
- From: mir@opera.chorus.fr (Adam Mirowski)
- Newsgroups: comp.sys.ibm.pc.hardware
- Subject: Re: A20 handler
- Message-ID: <301@chorus.chorus.fr>
- Date: 27 Aug 92 13:11:36 GMT
- References: <9208191350.AA07094@ucbvax.Berkeley.EDU>
- Sender: mir@chorus.chorus.fr
- Reply-To: mir@opera.chorus.fr (Adam Mirowski)
- Organization: Chorus systemes, Saint Quentin en Yvelines, France
- Lines: 31
-
- In article <9208191350.AA07094@ucbvax.Berkeley.EDU>, JULIUS@BTVLABVM.VNET.IBM.COM ("Julius C. Chang") writes:
- %%
- %% This is from my files and is an excerpt from a README file
- %% written by Bob Smith of Qualitas. Note that the excerpt explains
- %% the origin of the A20 Gate, but not why there are different A20
- %% handlers for HIMEM.SYS. Basically, the A20 Gate is implementation
- %% dependent and controlling the A20 line can (and usually does) vary
- %% from manufacturer to manufacturer.
- %%
- %% Julius
-
- That is a really brilliant article.
-
- It however doesn't address the question of A20 gate emulation
- using the virtual memory facilities of a 386. The memory wrap
- can probably be imitated by mapping the same memory twice: once
- in the first 64 Kb, and once just behind the 1Mb limit.
-
- If this mapping is done on a per-task basis - yes, 386's have
- an easy memory scheduling - the supervisor task(s) of an EMM386
- memory manager could have Gate A20 enabled, whereas VM86 tasks
- could see it as disabled.
-
- Am I re-inventing the wheel? Is this really done so in for
- example OS/2? I believe HIMEM.SYS doesn't put the machine into
- protected mode, so the memory scheduling cannot be used, but`
- this could change once EMM386 has beem loaded.
-
- --
- Adam Mirowski, mir@chorus.fr (FRANCE), tel. +33 (1) 30-64-82-00 or 74
- Chorus systemes, 6, av.Gustave Eiffel, 78182 Saint-Quentin-en-Yvelines CEDEX
-