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- Path: sparky!uunet!dtix!darwin.sura.net!wupost!usc!elroy.jpl.nasa.gov!nntp-server.caltech.edu!rknop
- From: rknop@cco.caltech.edu (Robert Andrew Knop)
- Newsgroups: comp.sys.cbm
- Subject: Re: ZIP chip - What is it?
- Message-ID: <1992Sep2.145110.20666@cco.caltech.edu>
- Date: 2 Sep 92 14:51:10 GMT
- References: <1992Sep2.141836.462@coe.montana.edu>
- Sender: news@cco.caltech.edu
- Organization: California Institute of Technology, Pasadena
- Lines: 18
- Nntp-Posting-Host: punisher
-
- drakonar@cs.montana.edu (Charles L. Stewart III) writes:
-
- >I haven't read this group for quite a while, so when I came across mention
- >of this "ZIP" chip, I was understandably curious. Anyone care to elaborate
- >on what this is? I may be interested. :-)
-
- The "ZIP" chip is a 8 or 12 MHz accelerator board for the C128 that will be
- put out by Parsec, Inc., the publisher of Twin Cities 128. For scads of
- discussion about it, including information from JBEE, the president of Parsec,
- check out the files zip* in the /pub/rknop/parsec directory on
- tybalt.caltech.edu. These files contain everything (up to about a month ago)
- that has been said about the ZIP board on GEnie.
-
- I will strive to get the file zip.form in that directory on the ftp site.
- Currently, it isn't here; check again tomorrow, or in a couple of days.
-
- -Rob Knop
- rknop@tybalt.caltech.edu
-