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- Path: sparky!uunet!mcsun!sunic!dkuug!imada!micro
- From: micro@imada.ou.dk (Klaus Pedersen)
- Newsgroups: comp.sys.atari.st.tech
- Subject: Re: DSP in the Falcon
- Message-ID: <1992Sep3.182630.19435@imada.ou.dk>
- Date: 3 Sep 92 18:26:30 GMT
- References: <H.H8xksAVnXI6@kynes.bison.mb.ca> <469@muller.loria.fr> <H.op5odQJVpyw@jonh.wimsey.bc.ca> <262@artech.UUCP>
- Sender: news@imada.ou.dk (USENET News System)
- Organization: Dept. of Math. & Computer Science, Odense University, Denmark
- Lines: 20
-
- clint@artech.UUCP (Clinton Keith) writes:
-
- >The adc/dac channel is driven off the DMA clock, which is driven off a
- >sub-divided horizontal scan rate. The 525 scan line rate sub-divided
- >by 12, 24, 48 and 96 give the 6250, 12500, 25000 and 50000 bytes per
- >second DMA/CODEC rate. This is the same as the STE/TT.
-
- In the very techie "test" of the Falcon in the German C'T you can read a
- differend story:
-
- "[external/internal clock, prescale 4-24 or 128]. Internally there is a
- 27.175MHz clock to select the for the STe known sampling rates of
- 12.5KHz, 25KHz and 50KHz, or 32MHz in order to use the full bandwidth of
- the memory transfer, with an sampling rate of 62.5KHz on eight 16bit
- channels. This is also the upper limit for the external clock."
-
- (if the about dosn't make any sense then it is probaly because my german
- is even worth than my english)
-
- -Klaus
-