NetNews Usenet Archive 1992 #19/NN_1992_19.iso/spool/comp/parallel/2021

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Newsgroups: comp.parallel
Path: sparky!uunet!gatech!hubcap!fpst
From: [e-mail] (Eugene Miya)
Subject: ICPP bib (editorial copy)
Message-ID: <[e-mail]>
Sender: [e-mail] (Steve Stevenson)
Organization: Clemson University
Date: Tue, 1 Sep 1992 12:44:25 GMT
Approved: [e-mail]
Lines: 1001

Had time waiting for a test.
The following should be considered editorial copy.
Attendees or readers should check for typos, send keywords,
annotations (labeled or anonymous), etc.

Final copy in the usual place after a copy of days.

%h $Revision:$ $Date:$

Lots of ri -> n errors

%J Proceedings of the 1992 International Conference on Parallel Processing
%V I, Architecture
%I CRC Press
%C Boca Raton, FL
%D August 1992

%V II, Software

%V III, Algorithms & Applications

%A Ahmed Louri
%A Hongki Sung
%T A Compiler Directed Cache Coherence Scheme with Fast and Parallel
Explicit Invalidation
%P I-2--I-9
%K caches,

%A Serge M. Manning
%A David G. Meyer
%T Asynchronous Execution Through Instruction Caching in
Massively Parallel Systems
%P I-10--I-17
%K caches,

%A Jen-Tien Yen
%A Behrooz Shirazi
%A Krishna Kavi
%T A New Cache Coherency and Address Translation Consistency Protocol
%P I-18--I-21
%K caches,

%A A. K. Nanda
%A L. N. Bhuyan
%T A Formal Specification and Verification Technique for
Cache Coherence Protocols
%P I-22--I-26
%K caches,

%A Arun Nanda
%A Lionel M. Ni
%T MAD Kernels: An Experimental Testbed to Study
Multiprocessor Memory System Behavior
%P I-28--I-35
%K memories,

%A William Y. Chen
%A Scott A. Mahlke
%A Wen-mei W. Hwu
%A Tolerating First Level Memory Access Latency in High-Performance Systems
%P I-36--I-43
%K memories,

%A Takeshi Kumagai
%T Inorder Skew: A Skewing Scheme for Parallel Tree Memories
%P I-44--I-47
%K memories,

%A Kay A. Robbis
%A Steven Robbins
%T Dynamic Behavior of Memory Reference Streams for
the Perfect Club Benchmarks
%P I-48--I-52
%K memories,

%A David Koppelman
%T Reducing PE/Memory Traffic in Shared Memory Multiprocessors by
the Difference Coding of Addresses
%P I-53--I-56
%K memories,

%A Youran Lan
%T Multicast in Faulty Hypercubes
%P I-58--I-61
%K multicomputer networks,

%A Keven Bolding
%A Smaragda Konstantinidou
%T On the Comparison of Hypercube and Torus Networks
%P I-62--I-66
%K multicomputer networks,

%A Smaragda Konstantinidou
%T Priorities in Nonminimal, Adaptive Routing
%P I-67--I-71
%K multicomputer networks,

%A Rajib K. Das
%A Krishnendu Mukhopadhyaya
%A Bhabani R. Sinha
%T Bridged and Twisted Hypercubes with Reduced Diameters
%P I-72--I-75
%K multicomputer networks,

%A Ronaki Fernandes
%T Recursive Interconnection Networks for Multicomputer Networks
%P I-76--I-79
%K multicomputer networks,

%A Ke Huang
%A Jie Wu
%T Balanced Hypercubes
%P I-80--I-84
%K multicomputer networks,

%A Ross E. Johnson
%A James R. Goodman
%T Synthesizing General Topologies from Rings
%P I-86--I-95
%K multicomputer networks,

%A Alan Rooks
%A Bruno R. Preiss
%T A Unifying Framework for Distributed Routing Algorithms
%P I-96--I-100
%K multicomputer networks,

%A Christopher J. Glass
%A Lionel M. Ni
%T Maximally Fully Adaptive Routing in 2D Meshes
%P I-101--I-104
%K multicomputer networks,

%A Khaled A. Aly
%A Patrick W. Dowd
%T Parallel Computer Reconfigurability Through Optical Interconnects
%P I-105--I-108
%K multicomputer networks,

%A Susan R. Dickey
%A Ora E. Percus
%T Performance Differences Among Combining Switch Architectures
%P I-11O--I-117
%K IC networks,

%A Hussein M. Alnuweiri
%A V. K. Pasanna Kumar
%T Optimal Multipass Self-Routing Algorithms for Clos-Type Multistage Network
%P I-118--I-122
%K IC networks,

%A Nabanita Das
%A Krishnendu Mukhopadhyaya
%A Jayasree Dattagutta
%T A Versatile External Control Method for Self-Routable Permutations in
Benes Network
%P I-123--I-126
%K IC networks,

%A Brian D. Alleyne
%A Isaac D. Scherson
%T Expanded Delta Networks for Very Large Parallel Computers
%P I-127--I-131
%K IC networks,

%A A. J. Field
%A P.G. Hamson
%T Transmission Times In Unbuffered Crossbars with Cyclic Arbitration
%P I-132--I-137
%K IC networks,

%A Ching-Yi Lee
%A A. Yavuz Oruc
%T Design of Efficient and Easily Routable Generalized Connectors
%P I-138--I-141
%K IC networks,

%A K. Wendy Tang
%A Sanjay A. Padubidri
%T Routing and Diameter Analysis of Diagonal Mesh Networks
%P I-143--I-150
%K multistage IC networks,

%A Yeimkuam Chang
%A Laxmi N. Bhuyan
%T Extending Multistage Interconnection Networks for Multitasking
%P I-151--I-158
%K multistage IC networks,

%A Akram Abdennadher
%A Tse-yun Feng
%T On Rearrangeability of Omega-Omega Networks
%P I-159--I-165
%K multistage IC networks,

%A Aloke Guha
%T A Design for Self-Routing Nonblocking Interconnection Networks
%P I-166--I-169
%K multistage IC networks,

%A Takaaki Kato
%A Koji Suginuma
%A Nader Bagherzadeh
%T On Design and Performance Analysis of a Superscalar Architecture
%P I-171--I-178
%K instruction level parallelism,

%A Yang-Chang Hong
%A Chihping Wang
%T A Tagflow Architecture that Supports Dataflow and Strict-Sequential
Instruction Scheduling
%P I-179--I-187
%K instruction level parallelism,

%A A. B. Ruighaver
%T From a Very Long Instruction Word Architecture to
a Decoupled Multicomputer Architecture
%P I-188--I-191
%K instruction level parallelism,

%A John Holm
%A Prithviraj Banerjee
%T Low Cost Concurrent Error Detection in a VLIW Architecture Using
Replicated Instructions
%P I-192--I-195
%K instruction level parallelism,

%A Muhammad F. Mudawwar
%A C. Y. Roger Chen
%T The Signal Flow Model: A Novel Data Driven Approach to Parallel Processing
%P I-196--I-200
%K instruction level parallelism,

%A Jeff Baxter
%A Balkrishna Ramkumar
%A Janak Patel
%T Compile Time Parallel Resource Allocation for
Unbounded Tree Structure Task Graphs
%P I-202--I-209
%K communications, synchronization and data mapping,

%A Juan Li
%A Leah H. Jamieson
%T Algorithm-Architecture Mapping Using Hypergraphs:
Theory and Experimental Results
%P I-210--I-219
%K communications, synchronization and data mapping,

%A Jean-Marc Monti
%A Guang R. Gao
%T Efficient Interprocessor Synchronization/Communication on
a Dataflow Multiprocessor Architecture
%P I-220--I-223
%K communications, synchronization and data mapping,

%A Francis P. Augustine
%A Ravi Varadarajan
%T Efficient Mappings for Multi-dimensional Systolic Arrays Using
Flexible Buffer Structures
%P I-224--I-227
%K communications, synchronization and data mapping,

%A Martin H. Davis, Jr.
%A Umakishore Ramachandran
%T A Distributed Hardware Barrier in an
Optical Bus-Based Distributed Shared Memory Multiprocessor
%P I-228--I-231
%K communications, synchronization and data mapping,

%A Gene Saghi
%A Howard Jay Siegel
%A Jose A. B. Fortes
%T On the Viability of a Quantitative Model of System Reconfiguration Due to
a Fault
%P I-233--I-242
%K fault tolerance,

%A Hasan Cam
%A Jose A. B. Fortes
%T Fault-Tolerant Self-Routing Permutation Networks
%P I-243--I-247
%K fault tolerance,

%A Shakil Akhtar
%T Reliability of Multiple Bus Multiprocessor Systems
%P I-248--I-252
%K fault tolerance,

%A Qing Yang
%A Hong Wang
%T On Fault-Tolerant Computation of Orthogonal Transforms on
Hypercube Computers
%P I-253--I-256
%K fault tolerance,

%A Evangelos P. Markatos
%A Thomas L. Blanc
%T Load Balancing vs. Locality Management in Shared-Memory Multiprocessor
%P I-258--I-267
%K miscellaneous hardware,

%A Ramesh Krishnamurti
%A Bhagirath Narahari
%T Preemptive Scheduling of Independent Jobs on
Partitionable Parallel Architectures
%P I-268--I-275
%K miscellaneous hardware,

%A David Smitley
%A Frank Hady
%A Dan Bums
%T Hnet: A High-performance Network Evaluation Testbed
%P I-276--I-279
%K miscellaneous hardware,

%A Samuel A. Fineberg
%A Thomas L. Casavant
%T A Preliminary Performance Evaluation of
the Seamless Parallel Processing System Architecture
%P I-280--I-284
%K miscellaneous hardware,

%A Chung-Ho Chen
%A Arun K. Somani
%T Effects of Cache Traffic on Shared Bus Multiprocessor Systems
%P I-285--I-288
%K miscellaneous hardware,

%A Minze V. Chien
%A A. Yavuz Oluc
%T Adaptive Binary Sorting Schemes and Associated Interconnection Networks
%P I-289--I-29x?
%K miscellaneous hardware,

%A Ming-Hwa Wang
%A Thomas W. Christopher
%T Simulate CSP-Like Synchronous Communications by MDC Asynchronous Message
Passing and Pattern Matching
%P II-2--II-9
%K communications,

%A Philip K. McKinley
%A Hong Xu
%A Abdol-Hossein Esfahanian
%A Lionel M. Ni
%T Unicast-Based Multicast Communication in Wormhole-Routed Networks
%P II-10--II-19
%K communications,

%A Thomas W. Christopher
%T A Technique for Damping Exponential Behavior in Reactive Object Algorithms
with Invalidation
%P II-20--II-23
%K communications,

%A Sampath Rangarajan
%A Yennun Huang
%A Satish K. Tripathi
%T Computing Threshold Times for k-Resilient Protocols
%P II-24--II-27
%K communications,

%A Soo-Young Lee
%A Chung-Ming Chen
%T Analyzing Effect of Shared Data Replication on
Minimizing Communication Overheads
%P II-28--I-31
%K communications,

%A Liang-Fang Chao
%A Edwin Hsing-Mean Sha
%T Retiming and Unfolding Data-Flow Graph
%P II-33--I-40
%K dataflow,

%A M. R. Thistle
%A T. L. Sterling
%A J. T. Kuehn
%A T. A. Anastasio
%T The Effectiveness of Random Mapping on Fine-Grain MIMD Architectures
%P II-41--II-48
%K dataflow,

%A Shridhar Shukla
%A Brian Little
%T A Compile-Time Technique for Controlling Real-time Execution of Task-level
Data-Flow Graphs
%P II-49--II-56
%K dataflow,

%A Emile Haddad
%T Optimal Distribution of Random Workloads Over Heterogeneous Processors
with Contrasting Loads
%P II-58--II-65
%K load distribution/balancing,

%A Zheng Lin
%A Jack Minker
%T A Distributed Load Balancing Scheme for Parallel Logic Programming
%P II-66--II-73
%K load distribution/balancing,

%A James M. Conrad
%A Dharma P. Agrawal
%T A Graph Partitioning-Based Load Balancing Strategy for
a Distributed Memory Machine
%P II-74--II-81
%K load distribution/balancing,

%A Jin-Chin Chung
%T Optimal Loop Parallelization Based on a Retiming Technique
%P II-83--II-90
%K loop/program parallelization,

%A Ten H. Tzen
%A Lionel M. Ni
%T Data Dependence Analysis and Uniformization for Doubly Nested Loops
%P II-91--II-99
%K loop/program parallelization,

%A Joseph Hummel
%A Laurie J. Hendren
%A Alexandru Nicolau
%T Applying an Abstract Data Structure Description Approach to
Parallelizing Scientific Pointer Programs
%P II-100--II-104
%K loop/program parallelization,

%A Alex L. Cheung
%A Anthony P. Reeves
%T Sparse Data Representation for Dense Data-Parallel Computation
%P II-106--II-113
%K manipulation of data objects,

%A Avraham Leff
%A Joel Wolf
%A Philip S. Yu
%T Distributed Object Replication Strategies for a Remote Caching Architecture
%P II-114--II-123
%K manipulation of data objects,

%A Jayashree Ramanathan
%A Lionel M. Ni
%T Exploiting Data Exchange Patterns in Creating Objects for
NUMA Shared Virtual Memory Systems
%P II-124--II-131
%K manipulation of data objects,

%A Parameswaran Ramanathan
%A Suresh Chalasani
%T Resource Placement in k-Ary n-Cubes
%P II-133--II-140
%K performance and operating systems,

%A Yi Pan
%T On Efficient Distributed Elections in Clustered Chordal Rings
%P II-141--II-144
%K performance and operating systems,

%A Thierry Priol
%A Zakaria Lahjomri
%T Experiments with Shared Virtual Memory on a iPSC/2 Hypercube
%P II-145--II-148
%K performance and operating systems,

%A Kia Makki
%A Paul Banta
%A Ken Been
%A Niki Pissinou
%T On Algorithms for Mutual Exclusion in Distributed Systems
%P II-149--II-152
%K performance and operating systems,

%A Mikos Krivossidis
%A Carl Tropper
%T A Performance Analysis of Time Warp
%P II-153--II-152
%K performance and operating systems,

%A Chris Houck
%A Gul Agha
%T HAL: A High-Level Actor Language and Its Distributed Implementation
%P II-158--II-165
%K parallel languages and programming,

%A Amitabha Das
%A Louise E. Moser
%A P. M. Melliar-Smith
%T PAL: A Language for Parallel Asynchronous Computation
%P II-166--II-173
%K parallel languages and programming,

%A H. G. Dietz
%T Common Subexpression Induction
%P II-174--II-182
%K parallel languages and programming,

%A Henry Thomas
%A Henk Sips
%A Edwin Paalvast
%T A Taxonomy of User-Annotated Programs for Distributed Memory Computers
%P II-184--II-191
%K parallel programs,

%A Jyh-Herng Chow
%A William Ludwell Harrison, III
%T A General Framework for Analyzing Shared-Memory Parallel Programs
%P II-192
%K parallel programs,

%A Carole M. McNamee
%A Ronald A. Olsson
%T Static Inter-Module Analysis for Determining Processor Co-Residency
%P II-200
%K parallel programs,

%A Randall A. Helzerman
%A Mary P. Harper
%T Log Time Parsing on the MasPar MP-1
%P II-209--II-217
%K parsers and compilers,

%A Scott R. Cannon
%T Experience with a Tuple-Space Approach for Parallel Compilation of
LR Languages
%P II-218--II-225
%K parsers and compilers,

%A Ping-sheng Tseng
%T Network Parallel Computing with a Command Interpreter
%P II-226--II-232
%K parsers and compilers,

%A De-Ron Liang
%A Satish K. Tripathi
%T Analyzing Tradeoffs Between Temporary Consistency and Concurrent with
Rollbacks and Aborts
%P II-234--II-241
%K consistency and race detection,

%A Robert H. B. Netzer
%A Sanjoy Ghosh
%T Efficient Race Condition Detection for Shared-Memory Programs with
Post/Wait Synchronization
%P II-242--II-246
%K consistency and race detection,

%A Emmi Schatz
%A Barbara G. Ryder
%T Directed Tracing to Detect Race Conditions
%P II-247--II-250
%K consistency and race detection,

%A Larry D. Wittie
%A Gudjon Hermannsson
%A Ai Li
%T Eager Sharing for Efficient Massive Parallelism
%P II-251--II-255
%K consistency and race detection,

%A A. Jefferson Offutt
%A Roy P. Pargas
%A Scott V. Fichter
%A Prashant K. Khambekar
%T Mutation Testing of Software Using a MIMD Computer
%P II-257--II-266
%K miscellanous software,

%A M. O. Esonu
%A A. J. Al-Khalili
%A S. Hariri
%T Design Methodology for Fault-Tolerant Systolic Array Architectures
%P II-267--II-274
%K miscellanous software,

%A Sanjay Gadkari
%T Layered Encapsulations for Portable Parallel Programming
%P II-275--II-278
%K miscellanous software,

%A G. N. Srinivasa Prasanna
%A Anant Agarwal
%T Compile-time Techniques for Processor Allocation in
Macro Dataflow Graphs for Multiprocessors
%P II-279--II-283
%K miscellaneous software,

%A Ding-Kai Chen
%A Pen-Chung Yew
%T A Scheme for Effective Execution of Irregular Do-across Loops
%P II-285--II-292
%K miscellaneous software,

%A Dz-ching Ju
%A Chuan-lin Wu
%A Paul Carini
%T The Synthesis of Array Functions and Its Use in Parallel Computation
%P II-293--II-296
%K miscellaneous software,

%A Alexandru Nicolau
%A Steven Novack
%T An Efficient Global Resource Constrained Technique for
Exploiting Instruction Level Parallelism
%P II-297--II-301
%K miscellaneous software,

%A Viet Ngo
%A Gary Elesser
%A Sourav Bhattacharya
%A Wei-Tek Tsai
%T Array Covering: A Technique for Enabling Loop Parallelization
%P II-302--II-305
%K miscellaneous software,

%A Jianzhong Li
%A Jaideep Srivastava
%T A High Dimensional Array Assignment Method for Parallel Computing Systems
%P II-306--II-3xx?
%K miscellaneous software,

%A R. Lin
%T Reconfigurable Buses with Shift Switching ... VLSI Radix Sort
%P III-2--III-9
%K reconfiguration and broadcast,

%A D. Bhagavathi
%A P. J. Looges
%A S. Olariu
%A J. L. Schwing
%A J. Zhang
%T A Fast Selection Algorithm for Meshes with Multiple Broadcasting
%P III-10--III-17
%K reconfiguration and broadcast,

%A Jang-Ping Sheu
%A Ming-Yang Su
%T A Multicast Algorithm for Hypercube Multiprocessors
%P III-18--III-22
%K reconfiguration and broadcast,

%A Jie Wu
%T Fault-Tolerant Nonredundant Broadcasting in Hypercubes
%P III-23--III-26
%K reconfiguration and broadcast,

%A M. C. Heydemann
%A J. Opatrny
%A D. Sotteau
%T Embeddings of Hypercubes and Grids into de Bruijn Graphs
%P III-28--III-37
%K communication algorithms,

%A Junlin Liu
%A Bruce McMillin
%T A Divide and Conquer Ring Embedding Scheme in Hypercubes with
Efficient Recovery Ability
%P III-38--III-45
%K communication algorithms,

%A Jehoshua Bruck
%A Robert Cypher
%A Ching-Tien Ho
%T Fault-Tolerant de Bruijn and Shuffle-Exchange Networks
%P III-46--III-50
%K communication algorithms,

%A Emmanouel A.  Varvarigos
%A Dimitri P. Bertsekas
%T Partial Multinode Broadcast Algorithms for D-Dimensional Meshes
%P III-51--III-54
%K communication algorithms,

%A Ching-Tien Ho
%A M. T. Raghunath
%T Efficient Algorithm for Gray-to-Binary Permutation on Hypercubes
%P III-55--III-59
%K communication algorithms,

%A Heonchul Park
%A Viktor Prasanna
%T A Class of Optimal VLSI Architectures for
Computing Discrete Fourier Transform
%P III-61--III-68
%K linear algebra,

%A Javed I. Khan
%A Woei Lin
%A David Y. Y. Yun
%T A Parallel Matrix Inversion Algorithm on Torus with Adaptive Pivoting
%P III-69--III-71
%K linear algebra,

%A Sam H. Noh
%A Soo-Mook Moon
%A Ashok K. Agrawala
%T The RPT Parallel Gaussian Elimination Algorithm
%P III-73--III-76
%K linear algebra,

%A Ted Szymanski
%T The Complexity of FFT and Related Butterfly Algorithms on
Meshes and Hypermeshes
%P III-77--III-81
%K linear algebra,

%A Yi-ling F. Chiang
%T On Use of Adaptive Chebychev Iteration in Eigenvalue Problems
%P III-82--III-86
%K linear algebra,

%A Harold E. Conn
%A Louis J. Podrazik
%T Parallel Recurrence Solvers for Vector and SIMD Supercomputers
%P III-87--III-95
%K linear algebra,

%A Kumar N. Ganapathy
%A Benjamin W. Wah
%T Synthesizing Optimal Lower Dimensional Processor Arrays
%P III-96--III-103
%K linear algebra,

%A C.-H. Huang
%A J. R. Johnson
%A R. W. Johnson
%T Generating Parallel Programs from Tensor Product Formulas: A Case Study of
Strassen's Matrix Multiplication Algorithm
%P III-104--III-108
%K linear algebra,

%A A. J. Huang
%A Z. George Mou
%T Parallel Partition Expansion for the Solution of Arbitrary Recurrences
%P III-109--III-113
%K linear algebra,

%A Viktor K. Prasanna
%A Anil S. Rao
%T Parallel Orientation of Polygonal Parts
%P III-115--III-122
%K geometry,

%A Chang-Sung Jeong
%A Sun-Mi Kim
%A Seung-Bong Baek
%T Parallel Computation of Congruent Regions on SIMD Machines
%P III-123--III-126
%K geometry,

%A Ju-wook Jang
%A Viktor K. Prasanna
%T Efficient Parallel Algorithms for Some Geometric Problems on
Reconfigurable Mesh
%P III-127--III-130
%K geometry,

%A Chandrasekhar Narayanaswami
%A William Randolph Franklin
%T Boolean Combinations of Polygons in Parallel
%P III-131--III-135
%K geometry,

%A Fenglien Lee
%A Si-Qing Zheng
%T Constructing Voronoi Diagram of a Point Set on Mesh of Trees
%P III-136--III-140
%K geometry,

%A Soo-Young Lee
%A Nasser G. Azari
%T Hybrid Task Decomposition for Particle-in-Cell Method on
Message Passing Systems
%P III-141--III-144
%K geometry,

%A Ming-Shing Yu
%A Cheng-Hsing Yang
%T An Optimal Parallel Algorithm for the Domatic Partition Problem on
Interval Graphs
%P III-146--III-152
%K graph theory,

%A W.-J. Hsu
%A C. V. Page
%A J. S. Liu
%T Computing Prefixes on a Large Family of Interconnection Topologies
%P III-153--III-159
%K graph theory,

%A Ming-Shing Yu
%A Lin Yu Tseng
%A Jiunn-Homg Lin
%T Optimal Parallel Algorithms for Some Problems on Trees
%P III-160--III-163
%K graph theory,

%A Calvin C.-Y. Chen
%A Sajal Das
%T Efficient Parallel Algorithms for Computing Articulation Points and
Bridges of Interval Graphs
%P III-164--III-167
%K graph theory,

%A Soo-Young Lee
%A Kyung-Geun Lee
%T Asynchronous Communication of Multiple Markov Chains in
Parallel Simulated Annealing
%P III-169--III-176
%K hard problems,

%A Kyung-Geun Lee
%A Soo-Young Lee
%T Efficient Parallelization of Simulated Annealing Using
Multiple Markov Chains: An Application to Graph Partitioning
%P III-177--III-180
%K hard problems,

%A Darrell R. Ulm
%A Pearl Y. Wang
%T Solving a Two-Dimensional Knapsack Problem on SIMD Computers
%P III-181--III-184
%K hard problems,

%A Ira Pramanick
%T Application of a Parallel Heuristic Framework to the Set Covering Problem
%P III-185--III-189
%K hard problems,

%A Arthur Ieurnwananonthachi
%A Benjamin W. Wah
%T Parallel Statistical Selection in Multiprocessors
%P III-190--III-195
%K hard problems,

%A Marios D. Dikaiakos
%A Anne Roger
%A Kenneth Steiglitz
%T Message Ordering in Multiprocessors with Synchronous Communication
%P III-196--III-203
%K routing,

%A Robert Cypher
%A Luis Gravano
%T Adaptive, Deadlock-Free Packet Routing in Torus Networks with
Minimal Storage
%P III-204--III-211

%A Abhijit Sengupta
%A Charles Elfe
%T On Fault-Tolerant Routing in Interconnection Digraphs
%P III-212--III-215

%A Xiaoxiong Zhong
%A Virginia M. Lo
%T An Efficient Heuristic for Application-Specific Routing on
Mesh Connected Multicomputers
%P III-216--III-219

%A David Nassimi
%T Parallel Algorithms for PM2B-ASCEND Computations on a SIMD Hypercube
Using Multiple Levels of Iteration-Grouping
%P III-221--III-228
%K scheduling,

%A Ramakrishna Thurimella
%A Yaacov Yesha
%T A Scheduling Principle for Precedence Graphs with Communication Delay
%P III-229--III-236

%A Harish Sethu
%A Meghanad D. Wagh
%T Design of Time-Optimal Hardware-Efficient Divide-and-Conquer Algorithms
%P III-237--III-240
%K scheduling,

%A Sadun Anik
%A Wen-mei W. Hwu
%T Executing Nested Parallel Loops on Shared-Memory Multiprocessors
%P III-241--III-244
%K scheduling,

%A Moon Jung Chung
%A Yunmo Chung
%T Performance Prediction Based on Gate to Processor Ratio
%P III-246--III-253
%K simulation,

%A Jiajen M. Lin
%A Santosh G. Abraham
%T Discrete Event Simulation on Shared Memory Multiprocessors Using
Global Simulation Information
%P III-254--III-261

%A Tomohiro Kudoh
%A Tetsuro Kimura
%A Hideharu Amano
%A Takuya Terasawa
%T A Parallel Logic Simulation Algorithm Based on Query
%P III-262--III-266

%A A. Cruz
%A D. Sarma
%T An Improved Parallel Processing Fault Simulator Algorithm: PLAto
%P III-267--III-270

%A Vinay S. Pai
%A Alejandro A. Schaffer
%A Peter J. Varman
%T Markov Analysis of Multiple-Disk Prefetching for External Mergesort
%P III-272--III-279
%K sorting,

%A Jang-Pang Sheu
%A Yuh-Shyan Chen
%A Chih-Yung Chang
%T Fault-Tolerant Sorting Algorithm on Hypercube Multicomputers
%P III-280--III-284

%A Yen-Chun Lin
%T Perfectly Overlapped Sorting on a Linear Array
%P III-285--III-288

%A Zicheng Guo
%T Sorting on Array Processors with Pipelined Busses
%P III-289--III-292

%A Masood Bolorforoush
%A Nastaran S. Coleman
%A Donna Quammen
%A Pearl Wang
%T A Parallel Randomized Sorting Algorithm
%P III-293--III-296

%A Narsingh Deo
%A Amit Jain
%A Muralidhar Medidi
%T Constructing Height Balanced Trees in Parallel
%P III-297--III-300
%K sorting,

%A Jing-Fu Jenq
%A Sartaj Sahni
%T Image Shrinking and Expanding on a Pyramid
%K III-302--III-309
%K miscellaneous algorithms,

%A Ventaramana Kommu
%A Irith Pomeranz
%T Effect of Communication in a Parallel Genetic Algorithm
%K III-310--III-317
%K miscellaneous algorithms,

%A Peter Wohl
%A Thomas W. Christopher
%T Designing Conceptual Clustering for Parallel Implementation
%K III-318--III-325
%K miscellaneous algorithms,

%A Win-tsung Lo
%A Shietung Peng
%T An Optimal Parallel Algorithm for a Core of a Tree
%K III-326--III-329
%K miscellaneous algorithms,

%A Eliezer Dekel
%A Jie Hu
%A Wen Ouyang
%T An Efficient Parallel Algorithm for Finding Compact Sets
%P III-331--III-337
%K miscellaneous algorithms,

%A Hsing-Lung Chen
%A Nian-Feng Tzeng
%T Quick Determination of Subcubes in a Faulty Hypercube
%P III-338--III-345
%K miscellaneous algorithms,

%A Peter Adamson
%A Evan Tick
%T Parallel Algorithms for the Single-Source Shortest-Path Problem
%P III-346--III-350
%K miscellaneous algorithms,

%A Yennun Huang
%A T. V. Lakshman
%A Dipak Ghosal
%T On the Availability of Parallel Protocol-Processing Systems
%P III-351--III-354
%K miscellaneous algorithms,

%A Young Man Kim
%A Ten-Hwang Lai
%A Yu-Chee Tseng
%T Compacting Free Buddy Subcubes in a Hypercube
%P III-355--III-?
%K miscellaneous algorithms,