home *** CD-ROM | disk | FTP | other *** search
- Path: sparky!uunet!cs.utexas.edu!rutgers!modus!gear!cube!arrigo
- From: arrigo@cube.sublink.org (Arrigo Benedetti)
- Newsgroups: comp.lsi.cad
- Subject: Node voltages limiting techniques in circuit simulators
- Message-ID: <1992Sep1.092921.1795@cube.sublink.org>
- Date: 1 Sep 92 09:29:21 GMT
- Sender: arrigo@cube.sublink.org
- Reply-To: arrigo@cube.sublink.org
- Organization: Arrigo Benedetti
- Lines: 29
-
-
- I'm designing an experimental multilevel MOS circuit simulator and I have
- a few questions about Spice3 node voltages limiting techniques.
- Spice3 limits the iteration change of MOS terminal voltages with an
- algorithm coded in the DEVlimvds(), DEVpnjlim() and DEVfetlim() functions
- in the devsup.c file. I studied the code contained in these routines,
- and, apart from the DEVpnjlim function, which seems to me a new version
- of the Colon algorithm as described by Nagel, I didn't find any reference
- to the algorithms implemented by DEVlimvds(), DEVfetlim().
- Is there any paper describing the theory behind these routines, or, as I
- am suspecting, are they just heuristic ?
- This question is important to me, as I found that the Newton algorithm
- applied to the circuit equations rarely converges if not used with
- some damping strategy.
- How does the Spice3 damping strategy compare to the one used by
- simulators of the first 70's, i.e. ECAP II, etc.?
- I am referring to the damping strategy where the full iteration
- update is multiplied by a scalar in the (0,1] interval which is chosen
- to minimize some norm of the nonlinear equations vector.
-
- Arrigo Benedetti
-
- I will summarize any reply to the net, if there is enough interest
- --
- Arrigo Benedetti e-mail: arrigo@cube.sublink.org (preferred)
- University of Bologna benedett@deis01.cineca.it
- undergraduate student (EECS)
- Via S. Agata, 11 Tel: (home) +39 59 224929
- 41100 Modena - Italy (office) +39 59 216688 (fax) +39 59 220727
-