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- From: vail@mamacass.etdesg.trw.com (Steve Vaillancourt)
- Newsgroups: comp.arch
- Subject: Re: Error Correcting Memory
- Message-ID: <2AA7A9C4.849@deneva.sdd.trw.com>
- Date: 4 Sep 92 18:24:03 GMT
- References: <Sep03.210730.68303@yuma.ACNS.ColoState.EDU>
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- Organization: TRW
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-
- Error Correcting Memory
- to Spencer Shafer
-
- from Steve Vaillancourt
- email vail@mamacass.etdesg.trw.com
-
- Here's a short list of some of the better articles:
-
- Reliability of Scrubbing Recovery Techniques for Memory System
- by Saleh, Serrano & Patel, IEEE transactions on Reliability Vol.39
- No.1, 1990 April
-
- Reliability Modeling and Analysis of Fault-Tolerant Memories
- Cox & Carroll, IEEE Transactions on Reliability, Vol R-27, No.1, April
- 1978
-
- The Reliability of Single-Error Protected COmputer Memories
- Balum, Goodman, Mceliece, IEEE Transactions on COmputers, Vol 37, No. 1,
- Jan 1988
-
- Reliability and Performance of Error-Correcting Memory and Register Arrays
- Elkind & Siewiorek, IEEE Transactions on COmputers Vol C-29, No.10, Oct
- 1980
-
- Fault-Tolerant Design Techniques for Semiconductor Memory Applications,
- Aichelmann, IBM Journal of Research & Development, Vol 28, No.2, March
- 1984
-