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- Path: sparky!uunet!olivea!hal.com!decwrl!csus.edu!netcom.com!netcom!mjohnson
- From: mjohnson@netcom.Netcom.COM (Mark Johnson)
- Newsgroups: comp.arch
- Subject: Re: ALPHA : Single Transistor Clocking
- Message-ID: <MJOHNSON.92Sep2185309@netcom.Netcom.COM>
- Date: 3 Sep 92 02:53:09 GMT
- References: <1992Sep3.004732.15291@rkna50.riken.go.jp>
- Organization: Netcom Online Communications Service
- Lines: 31
- In-Reply-To: wong@rkna50.riken.go.jp's message of Thu, 3 Sep 1992 00:47:32 GMT
-
- In article <1992Sep3.004732.15291@rkna50.riken.go.jp> wong@rkna50.riken.go.jp (Wong Weng Fai) writes:
- >According to what I know, right dead center of the
- >ALPHA chip is a single, huge transistor that is used
- >for clock distribution.
- >What are the advantages and disadvantages ?
- >Is it the way to go for distribution of high
- >frequency clocks ?
-
- Have a look at the Alpha technical paper in the 1992 Digest
- of Technical Papers of the International Solid-State Circuits
- Conference ("ISSCC"), and also the Slide Supplement.
-
- The clock distribution network forms a stripe from
- top to bottom, about 1/3 of the way of the left edge
- (if you orient the photo the same way I did).
-
- There are definitely more than one transistor in this
- stripe; see the figures in the paper for a circuit
- topology. In fact, I would be very surprised to learn
- of any microprocessor whose onchip clock was generated
- by a single transistor; in the standard circuit style
- a lower bound would be two transistors, one to drive the
- clock's load to logic-1, and another to drive the load
- to logic-0.
-
- "Is this the way to go?" --- depends on who you ask
- and what research or design community they represent.
- If you ask the question in Hudson, MA ...... "yes"
- If you ask the question in Pasadena, CA .... "no"
-
- --mj
-