home *** CD-ROM | disk | FTP | other *** search
- Newsgroups: comp.arch
- Path: sparky!uunet!newsgate.watson.ibm.com!yktnews!admin!yktnews!prener
- From: prener@watson.ibm.com (Dan Prener)
- Subject: Re: Configurable/Switchable Endianess
- Sender: news@watson.ibm.com (NNTP News Poster)
- Message-ID: <PRENER.92Aug27194052@prener.watson.ibm.com>
- In-Reply-To: djaggar@armltd.uucp's message of 26 Aug 92 09:20:51 GMT
- Date: Fri, 28 Aug 1992 00:40:52 GMT
- Distribution: comp
- Disclaimer: This posting represents the poster's views, not necessarily those of IBM
- References: <5752@armltd.uucp>
- Nntp-Posting-Host: prener.watson.ibm.com
- Organization: IBM T.J. Watson Research Center, Hawthorne, New York
- Lines: 18
-
- In article <5752@armltd.uucp> djaggar@armltd.uucp (Dave Jaggar) writes:
-
- >I am interested in microprocessors that are able to execute code, or
- >process data in either endianness, and how they achieve this. For
- >instance the ARM6 family of CPUs have a pin or a bit in a system
- >register (depending on the model), which sets the endianness of the
- >processor, by determining which byte is selected off the data bus for
- >byte load/store operations. The MIPS R3000 has a pin that you set at
- >reset, but what does this do internally (affect byte ops or word ops) ?
- >Is it the same on R6000, R4000xx ? The ATT Hobbit has switchable data
- >endianness (how do you switch ?), does this mean that the endianess of
- >code is fixed ? Does anyone implement a "load data of the other
- >endianness instruction" ?
-
- The IBM RS/6000 is a big-endian machine which has little-endian load/store
- ops.
- --
- Dan Prener (prener@watson.ibm.com)
-