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- From: rohrer@fncrd6.fnal.gov (Keith Rohrer)
- Newsgroups: comp.sys.ibm.pc.hardware,comp.sys.intel,comp.os.linux
- Subject: Re: Help - Cyrix processors, anyone know for sure?
- Message-ID: <2197@fnnews.fnal.gov>
- Date: 17 Aug 92 18:16:45 GMT
- References: <0105010F.b54s7l@mprnews.mpr.com>
- Sender: news@fnnews.fnal.gov
- Followup-To: comp.sys.ibm.pc.hardware
- Organization: Fermilab
- Lines: 32
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- Followups-to: rohrer@fncrd0.fnal.gov
-
- In article <0105010F.b54s7l@mprnews.mpr.com> mslater@mpr.com writes:
- [deleted]
- >It is true that the cache must be enabled by initialization software,
- >but this can be done by a program (supplied by Cyrix to its OEMs)
- >that in part of autoexec.bat.
- Is (assembler?) source to this/such a program going to be available,
- so those of us not using DOS can use it?
-
- >The Cyrix chips have some additional signals to handle A20 masking
- >and cache control, and for best performance, the hardware needs a
- >small modification (a couple gates and a few wires) to support these
- >signals. It is not absolutely necessary, however; the chips have software
- >control registers that allow the needed functions to be implemented
- >without any hardware mods, but there is a small performance hit. For
- >example, without the hardware mods, the chip must make the first 64K
- >of each 1 Mbyte region non-cacheable to avoid the A20 wrap-around
- >problems.
- I take it this is to avoid the Microsoft HMA kludge; can those of us
- who use something besides DOS, or hold our right hands up and solemnly
- swear not to use the HMA when we do, disable this feature?
-
- >Michael Slater, Microprocessor Report mslater@mpr.com
- >P.O. Box 2438, Sebastopol CA 95473 707/823-4004 fax 707/823-0504
-
- Keith
- (rohrer@fncrd0.fnal.gov, where all followups/replies should be sent...)
-
- --
- Disclaimer: None of Grinnell College, URA, Fermilab, and any other affiliated
- persons or orginizations have licensed my ideas or opinions, and thus are
- not entitled to any which may appear above.
-
-