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- Path: sparky!uunet!munnari.oz.au!yoyo.aarnet.edu.au!sirius.ucs.adelaide.edu.au!levels!8809787l
- From: 8809787l@levels.unisa.edu.au
- Newsgroups: comp.lsi.testing
- Subject: Benchmark Circuits for Digital circuit test pattern generation
- Message-ID: <18341.2a92f106@levels.unisa.edu.au>
- Date: 19 Aug 92 15:40:29 GMT
- Organization: University of South Australia
- Lines: 48
-
- Dear reader
-
- In many papers in the field of fault diagnosis and Test generation for digital
- circuits I have seen benchmark circuits used to make comparison between the
- speed and effeciency of various test generation methods.
-
- I have commonly seen labels such as C880, C5315 or C7552 used to describe or
- mension these benchmark circuits. In many papers on this topic also I have seen
- the following reference to this circuits mensioned:
-
- (*) F. Brglez and H. Fujiwara, "A neutral netlist of ten combinational
- benchmark circuits and a target translator in FORTRAN," in Proc. IEEE Int.
- Symp. on Circuits and Systems, Kyoto, Japan, June 5-7, 1985
-
- One place that I found this reference mensioned was in :
-
- (*) Short Papers "Expremental Evaluation of Testability Measure for Test
- Generation" by Chandra & Patel in IEEE trans. on Computer Aided Design Vol. 8,
- No. 1 January 1989.
-
- I need to know the following:
-
- (1) What are these benchmark circuits ?
-
- (2) Where can I get these from ?
-
- (3) What is the Brglez & Fujiwara reference ( I could not locate it ) ?
-
- (4) How can I use the above benchmark netlist to test a test generation method?
-
- (5) Is there a updated version of this which has come out since 1989 ?
-
-
- I would be very greatfull if some one could help me by responding to the
- following e-mail address:
-
- 8809787L@LV.LEVELS.UNISA.EDU.AU
-
- Thank you very much, and hope to hear from you soon.
-
-
- Yours faithfully
- Peyam Pourbeik
-
-
- School of Electronic Engineering
- University of South Australia ( Levels campus )
- Adelaide, South Australia, Australia
-