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- Newsgroups: comp.lsi.cad
- Path: sparky!uunet!cs.utexas.edu!torn!watserv2.uwaterloo.ca!sun3.vlsi.uwaterloo.ca!sun5.vlsi.uwaterloo.ca!jabarby
- From: jabarby@sun5.vlsi.uwaterloo.ca (J.A. Barby)
- Subject: Re: Simulation of mixed block (analog and Digital)
- Message-ID: <BtF0I0.CpI@sun3.vlsi.uwaterloo.ca>
- Sender: news@sun3.vlsi.uwaterloo.ca
- Organization: University of Waterloo
- References: <1992Aug18.171348.21243@cirrus.com>
- Date: Sun, 23 Aug 1992 02:34:47 GMT
- Lines: 54
-
- In article <1992Aug18.171348.21243@cirrus.com>, padma@cirrus.com (Padma Akkiraju) writes:
- > I am intersted in knowing about simulation tools,
- > methodologies that are used in the Industry
- > for simulating ASICS with on chip Analog blocks.
- >
- > I am also interested in modelling techniques used for behavioural
- > modeling of Analog blocks.
- >
- > Thanks in Advance
- > padma
- >
- > --
- > padma@cirrus.com
-
- I recently got the following when inquiring about similar questions.
- I have requested the list of models from Mark and will post them when
- they arrive.
- Jim Barby
-
- =======================================================================
-
- This message found its way to me.
-
- We now offer an extensive library of behavioral models for functional ASIC
- cells. As you know Jim, we have always had many of these cell models (e.g.
- A/D convertor, comparator, opamp ...).
-
- We recently did a survey of different ASIC vendors and found what were the
- most popular ASIC cell models. From this information we discovered that by
- adding approximately 20 more models, we would consistly have model coverage
- for more than 90% of an ASIC vender's cells. I will gladly send you a
- listing of these models if you wish.
-
- Speaking of ASIC simulation, we have also developed a new business package
- for mixed-signal ASIC vendors and designers. It is called the "ASIC
- Simulation Partner Program" (ASPP). This is a complete package which will
- give the ASIC vendor or designer a jump start on simulating mixed-signal
- ASICs. I can also send out more info about this.
-
- Thanks for the inquiry.
-
- Mark Chadwick
- mjc@analogy.com
- 503-520-2734
-
- --
- Mark J. Chadwick mjc@analogy.com
- Analogy Inc.
- P.O. Box 1669 Phone: (503) 626-9700
- Beaverton, Oregon 97075 Fax: (503) 643-3361
- --
- Jim Barby <jabarby@vlsi.UWaterloo.ca>
- VLSI Group, University of Waterloo, Waterloo, Ontario, Canada, N2L 3G1
- 519-885-1211x3995, FAX 519-746-5195
-