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PALASM Design Description  |  1991-02-27  |  2.3 KB  |  87 lines
  1. ;PALASM Design Description
  2.  
  3. ;---------------------------------- Declaration Segment ------------
  4. TITLE    TUTOR4.PDS
  5. PATTERN  A
  6. REVISION 1.0
  7. AUTHOR   J.ENGINEER
  8. COMPANY  ADVANCED MICRO DEVICES
  9. DATE     01/01/90
  10.  
  11. CHIP  COUNTER   PAL20RA10
  12.  
  13. ;---------------------------------- PIN Declarations ---------------
  14. PIN  1          PL                   COMBINATORIAL             ; INPUT
  15. PIN  2          EXT                  COMBINATORIAL             ; INPUT
  16. PIN  3          SET                  COMBINATORIAL             ; INPUT
  17. PIN  4          RST                  COMBINATORIAL             ; INPUT
  18. PIN  5          DIV_BY_2             COMBINATORIAL             ; INPUT
  19. PIN  6          DIV_BY_4             COMBINATORIAL             ; INPUT
  20. PIN  7          DIV_BY_8             COMBINATORIAL             ; INPUT
  21. PIN  12         GND                                            ; INPUT
  22. PIN  13         OE                   COMBINATORIAL             ; INPUT
  23. PIN  14         Q0                   REGISTERED                ; OUTPUT
  24. PIN  15         Q1                   REGISTERED                ; OUTPUT
  25. PIN  16         Q2                   REGISTERED                ; OUTPUT
  26. PIN  24         VCC                                            ; INPUT
  27.  
  28. ;----------------------------------- Boolean Equation Segment ------
  29. EQUATIONS
  30.  
  31. /Q0      = Q0
  32.  Q0.CLKF = EXT
  33.  Q0.TRST = DIV_BY_2
  34.  Q0.SETF = SET * /RST
  35.  Q0.RSTF = RST * /SET
  36.  
  37. /Q1      = Q1
  38.  Q1.CLKF = Q0
  39.  Q1.TRST = DIV_BY_4
  40.  Q1.SETF = SET * /RST
  41.  Q1.RSTF = RST * /SET
  42.  
  43. /Q2      = Q2
  44.  Q2.CLKF = Q1
  45.  Q2.TRST = DIV_BY_8
  46.  Q2.SETF = SET * /RST
  47.  Q2.RSTF = RST * /SET
  48.  
  49. ;----------------------------------- Simulation Segment ------------
  50. SIMULATION
  51.  
  52. TRACE_ON  EXT  SET  RST  DIV_BY_2  DIV_BY_4  DIV_BY_8  Q0  Q1  Q2
  53.  
  54. SETF OE /EXT /SET /RST /PL /DIV_BY_2 /DIV_BY_4 /DIV_BY_8
  55.                         ; DISABLE OUTPUT BUFFERS AND INIT CLOCK LINES
  56.  
  57. PRLDF /Q0 /Q1 /Q2       
  58.  
  59. SETF /OE DIV_BY_2 DIV_BY_4 DIV_BY_8           ;ENABLE OUTPUT BUFFERS
  60.  
  61. FOR I := 1 TO 16 DO
  62.   BEGIN
  63.     SETF  EXT
  64.     SETF /EXT
  65.   END
  66. SETF  SET
  67. SETF  EXT
  68. SETF /SET
  69. SETF /EXT
  70. FOR I := 1 TO 16 DO
  71.   BEGIN
  72.     SETF  EXT
  73.     SETF /EXT
  74.   END
  75. SETF  RST
  76. SETF  EXT
  77. SETF /RST
  78. SETF /EXT
  79. FOR I := 1 TO 16 DO
  80.   BEGIN
  81.     SETF  EXT
  82.     SETF /EXT
  83.   END
  84. TRACE_OFF
  85.  
  86. ;-------------------------------------------------------------------
  87.