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- RTE80 LEVEL 2.2 COMMAND SUMMARY V 3.0
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- 1. UTILITY COMMANDS (1)
- (1) HL HeLp
- (2) I {ufn1}{,ufn2} Input object and symbol file name
- (3) R {b} Read object and symbol file
- (4) LO ufn1{,b} Load object file into effective memory
- (5) SV ufn1,s,f Save effective memory into host file
- (6) VR ufn1{,b} Verify object file
- (7) LT ufn2 Load symbol file into symbol table
- (8) CT Clear symbol from symbol table
- Parameters:
- b ..... Bias address ufn1 ..... Object file name
- f ..... Final address ufn2 ..... Symbol file name
- s ..... Start address
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- 2. UTILITY COMMANDS (2)
- (9) H {v{,.symbol}} Display symbol and their value
- (10) PP Pause till any key input
- (11) LS {ufn}{,"message"} List emulation history
- (12) NL Nolist emulation history
- (13) ON Power on
- (14) EQ End quit
- (15) EX Save debug data and exit to host system
- Parameters:
- v ..... Value ufn ..... List file name
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- 3. INITIAL SETTING COMMANDS
- (16) SS {c} Display and change stopping state
- (17) MP {s {,f},c} Set and display memory map assignments
- (18) GU {s {,f},c} Set and display memory guard area
- (19) WP {s {,f},c} Set and display write protect area
- (20) UM s,f Transfer user memory to mapping memory
- Parameters:
- c ..... Condition (SS...BE/BD , MP...U/M , GU...U/G , WP...U/P)
- BE means BUSREQ is enable
- BD means BUSREQ is disable
- U means user memory(MP)/unguard(GU)/unprotect(WP)
- M means mapping memory
- G means guard
- P means protect
- f ..... Final address s ..... Start address
- /Final block /Start block
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- $ 4. MEMORY, REGISTER AND I/O PORT COMMANDS
- (21) M s,f,d Move effective memory
- (22) VM s,f,d Verify effective memory
- (23) F s,f,c Fill effective memory with constant
- (24) D {s}{,f} Display effective memory
- (25) L {s}{,f} List in TLCS-Z80 mnemonic instruction
- (26) S s{,{c0}...,{c14}} Display and substitute effective memory
- (27) A s Assemble effective memory directly
- (28) AK s Assemble effective memory with the check
- (29) X {r} Examine MPU registers
- (30) PI s Read data from input port
- (31) PO s{{,c0}...{,c14}} Write data to output port
- (32) PIO s{{,c0}...{,c14}} Read and write port data
- Parameters:
- c ..... Constant data f ..... Final address
- d ..... Destination address s ..... Start address
- r ..... Register name
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- $ 5. REAL TIME EMULATION AND TRACE MEMORY COMMANDS
- (33) RK {m},{e},{b},{p},{c} Set and display real time break registers
- (34) G {s},{b0},{b1} Go ( begins real time execution )
- (35) ST Stop MPU
- (36) PS Pause till stop state
- (37) TM {s}{,f} Display trace memory
- (38) SR s Search trace memory for address
- (39) RH Reset hold or wait state
- (40) RT Display execution time
- Parameters:
- b,b0,b1 ... Break address m ..... Break register number (0/1)
- c ..... Condition ( OP/MA/MR/MW/PA/PR/PW )
- OP means op-code fetch MA means memory access MR means memory read
- MW means memory write PA means I/O access PR means I/O read
- PW means I/O write
- e ..... Enable/Disable/Trace(E/D/T) p ..... Pass count
- f ..... Final step number s ..... Start address/Search address
- /Start step number
- $ 6. STEP EMULATION COMMANDS
- (41) T {n} Trace execution
- (42) TR {s}{,n} Trace execution from start address
- (43) TW {s}{,n} Trace execution without subroutine
- (44) U {n} Untrace execution
- (45) UT {s}{,n} Untrace execution from start address
- (46) SKm {e},{c},{l},{d},{p} Set and display step break registers
- (47) TL {g} Set and display logical SK0 and SK1
- Parameters:
- c ..... Register name
- (F/A/B/C/D/E/H/L/F'/A'/B'/C'/D'/E'/H'/L'/IX/IY/SP/I/R/PC/(adr)/W(adr))
- d ..... Comparison data l ..... Logical operater (EQ/GT/GE/LT/LE)
- e ..... Condition (E/D) g ..... Condition (A/O)
- E means enable A means AND
- D means disable O means OR
- n ..... Step number m ..... Break register number (0/1)
- p ..... Pass count s ..... Start address
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- 7. SELECT TRACE DISPLAY COMMANDS
- (48) TN {c} Select display of alternative registers
- (49) TT b,p Select trace display (branch,port I/O)
- TT a,{s},{f} (address area)
- Parameters:
- a ..... Mode (TA/UA/DA) f ..... Final address
- TA means trace address area p ..... Mode (TP/DP)
- UA means untrace address area TP means trace I/O
- DA means not select area DP means not select I/O
- b ..... Mode (TB/DB) s ..... Start address
- TB means trace branch
- DB means not select branch
- c ..... Mode (T/U)
- T means trace alternative registers
- U means no trace alternative registers
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- 8. INTERRUPT CONTROL COMMANDS
- (50) SI {i}{,e} Select condition interruption source
- (51) GI {i} Generate pseudo interruption
- Parameters:
- e ..... Condition (E/D) i ..... Interruption signal name (I/N)
- E means enable I means INT
- D means disable N means NMI
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- 9. MACRO TABLE CONTROL COMMANDS
- (52) LM ufn Load macro into macro table
- (53) CM {m} Clear macro command
- (54) MM {n} Change macro display mode
- (55) MT {m} Display macro table
- (56) AM m Add macro to macro table
- Parameters:
- m ..... Macro name ufn ... Macro file name
- n ..... Mode (E/D)
- E means display mode
- D means no display mode
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- 10. CONTROL HOST SYSTEM FILE COMMANDS
- (57) DIR {{ufn}{/W}} Display directry
- (58) DEL ufn Delete file
- (59) REN ufn1 ufn2 Rename file
- (60) TYPE ufn Type out file to console
- Parameters:
- ufn,ufn1,ufn2 ... File name /W ... Wide display
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- $ 11. EPROM WRITER CONTROL COMMANDS
- (61) PR EPROM writer control mode
- PR INTERNAL COMMANDS
- TY {t} Set EPROM type
- AD {m},{s},{f} Set memory and EPROM address
- R Read data from EPROM
- V Verify EPROM with memory
- B Execute blank check
- P Write data from memory to EPROM
- C Execute continuously B,P and V
- E Exit to RTE mode
- Parameters:
- f ... Final address s ... Start address
- m ... Effective memory t ... Type ( 64/128/256 )
- start address 64 means TMM2764D
- 128 means TMM27128D
- 256 means TMM27256D
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- (HELP END)