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- Xref: sparky comp.sys.super:1211 comp.arch:12437 comp.compilers:2277
- Newsgroups: comp.sys.super,comp.arch,comp.compilers
- Path: sparky!uunet!think.com!spdcc!iecc!compilers-sender
- From: jrbd@craycos.com (James Davies)
- Subject: Re: How many vector registers are useful?
- Reply-To: jrbd@craycos.com (James Davies)
- Organization: Cray Computer Corporation
- Date: Wed, 27 Jan 1993 16:40:35 GMT
- Approved: compilers@iecc.cambridge.ma.us
- Message-ID: <93-01-202@comp.compilers>
- References: <93-01-174@comp.compilers> <93-01-195@comp.compilers>
- Keywords: architecture, vector
- Sender: compilers-sender@iecc.cambridge.ma.us
- Lines: 15
-
- kirchner@uklira.informatik.uni-kl.de (Reinhard Kirchner) writes:
- > A register has an optimizing effect only when the value in it can be used
- > several times, ...
-
- jlg@cochiti.lanl.gov (J. Giles) writes:
- >... The other [optimization] (also true of scalars) is when the value is
- >an intermediate.
-
- Actually, there's a third effect: on machines with multiple functional
- units a load or store to/from a register can be done at the same time as
- other operations, so that the register can act like a small programmable
- cache (complete with prefetching).
- --
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