home *** CD-ROM | disk | FTP | other *** search
- Path: sparky!uunet!munnari.oz.au!uniwa!newsman!meek
- From: meek@csu.murdoch.edu.au (Lindsay Meek)
- Newsgroups: comp.sys.amiga.hardware
- Subject: Re: Any News on the new Motorola Chip?
- Date: 25 Jan 1993 18:32:06 GMT
- Lines: 24
- Message-ID: <1k1bn6INNau@newsman.csu.murdoch.edu.au>
- References: <1383@lorentz.sbi.com> <00966CDB.58A8E620@vms.csd.mu.edu> <hanscs.74.727431258@dhhalden.no> <C18o89.6MA@cs.columbia.edu>
- NNTP-Posting-Host: fizzy.csu.murdoch.edu.au
-
- won@cs.columbia.edu (Won Y. Kim) writes:
-
- >In article <hanscs.74.727431258@dhhalden.no> hanscs@dhhalden.no (HANS CHRISTIAN SANDER) writes:
- >[stuff deletedp
- >>>
- >>The 68060 will be released(Amiga Computing) late 93. And will do aprox. 100
- >>MIPS at 25 MHz.
- >>
-
- >Hmm, How can this be ?? Is the 060 a multi processor in one?
- >At a clock speed of 25 Mhz, the most a "normal" cpu (that I am aware of)
- >can execute at most 25 million instructions per second.
-
- >The # is usually smaller unless the code can utilize the pipleline 100 % (not
- >bloody likely!!)
-
- They might have increased the width of the data bus. This would allow
- /explain the 4x speed up at the same clock speed. However, the current state
- of-the-art in VLIW (Very Large Instruction word) designs requires that you
- have a customised code generator on your compiler to schedule the other three
- instruction units correctly. I think some of the new workstations use VLIW (?)./
-
- Lindsay
-
-