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- Path: sparky!uunet!pipex!bnr.co.uk!uknet!mucs!spec0.ee.man.ac.uk
- From: mark-r@spec0.ee.man.ac.uk (Mark Robinson (JO PhD))
- Newsgroups: sci.electronics
- Subject: 74HC4046 help required.
- Message-ID: <7116@m1.cs.man.ac.uk>
- Date: 5 Jan 93 13:16:43 GMT
- Sender: news@cs.man.ac.uk
- Organization: Dept Electrical and Electronic Eng, Manchester University, UK
- Lines: 25
-
-
- Hi all.
-
- If anyone has a datasheet for the 74HC4046 PLL chip handy would
- you let me know how the frequency of the VCO is related to the
- values of R's and C and the max/min values that they can take.
-
- I want to run it with a lock range of about 1MHz, centred on
- 8MHz, but the equations in the Maplin catalogue don't allow
- frequencies >2.8MHz (R=5k, C=50pF; ie the minimum allowed) even
- though they claim the VCO can get up to 15MHz. I think their
- data must be for the 4046 and none of our databooks are modern
- enough to include the 'HC4046 :-(
-
- Thanks
- Mark
- mark-r@spec0.ee.man.ac.uk
-
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