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- From: rees@pisa.citi.umich.edu (Jim Rees)
- Newsgroups: comp.protocols.ppp
- Subject: Re: sun serial >38400
- Date: 8 Jan 1993 19:59:59 GMT
- Organization: University of Michigan CITI
- Lines: 22
- Distribution: world
- Message-ID: <5d72c2b5.1bc5b@pisa.citi.umich.edu>
- References: <searsk-030193070145@3.7.192.190> <1993Jan6.213927.2788@ukw.uucp> <1igu0rINNsvt@grapevine.EBay.Sun.COM> <1993Jan7.194405.15843@colorado.edu> <1993Jan8.122742.3793@hemlock.cray.com>
- Reply-To: Jim.Rees@umich.edu
- NNTP-Posting-Host: pisa.citi.umich.edu
-
- In article <1993Jan8.122742.3793@hemlock.cray.com>, andyw@aspen32.cray.com (Andy Warner) writes:
-
- > Huh? Since when did an interrupt every 13us or so become an unbearable
- > load? For well-designed and trim interrupt routines, this is nothing. I've
-
- Go ahead, write a trim interrupt routine & PPP stack, you'll
- be a hero.
-
- The ppp stack doesn't have to be trim, only the interrupt routine.
-
- The problem of missing interrupts is a real one. If your mtu is 1500, then
- you have to catch every one of 1500 interrupts in a row. If you miss even
- one, the packet is lost. While processing an interrupt in 13 us may be
- easy, guaranteeing that you can get to it in time is not, at least in a
- general purpose computer.
-
- In this day of cheap microcontrollers, it seems to me that what you want is
- a controller on the serial io board that knows how to assemble ip packets.
- Using a silo helps, but it's less than ideal. The silo size and timeout
- have to be kept short to get reasonable latency. It would be a lot better
- if the processor were interrupted only when a complete packet is assembled.
- That's how synchronous (sdlc) boards work.
-