home *** CD-ROM | disk | FTP | other *** search
- Newsgroups: comp.arch
- Path: sparky!uunet!enterpoop.mit.edu!bloom-picayune.mit.edu!athena.mit.edu!jfc
- From: jfc@athena.mit.edu (John F Carr)
- Subject: Re: Swap byte instruction - how high is the win?
- Message-ID: <1993Jan8.224906.15621@athena.mit.edu>
- Sender: news@athena.mit.edu (News system)
- Nntp-Posting-Host: achates.mit.edu
- Organization: Massachusetts Institute of Technology
- References: <1993Jan7.074052.19620@qb.rhein-main.de> <1993Jan8.111731.19116@odin.diku.dk>
- Date: Fri, 8 Jan 1993 22:49:06 GMT
- Lines: 15
-
- In article <1993Jan8.111731.19116@odin.diku.dk>
- torbenm@diku.dk (Torben AEgidius Mogensen) writes:
-
- >Newer processors (including the new ARMs) tend to have selectable
- >endianness instead of byte swap instructions.
-
- The RS/6000 has a duplicate set of load and store instructions that
- byte-swap, but no register to register byte swap instruction. The
- store multiple and string instructions only come in big-endian forms,
- but those tend to be used when byte reversal isn't important (it
- doesn't matter if the saved registers on the stack are byte swapped,
- as long as they are correct once restored).
-
- --
- John Carr (jfc@athena.mit.edu)
-