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- Newsgroups: comp.sys.ibm.pc.hardware
- Path: sparky!uunet!cs.utexas.edu!asuvax!chnews!hfglobe!ptd!ssivakum
- From: ssivakum@ptdcs2.intel.com (Sam Sivakumar)
- Subject: Re: What's the deal? My chip says "SX-25"; Norton says "SX-33"
- Message-ID: <1992Dec30.233238.14371@ptdcs2.intel.com>
- Organization: Intel Corporation -- Aloha, Oregon
- References: <5870140@pollux.svale.hp.com> <C01LuI.542@news.cso.uiuc.edu> <sheldon.725671411@pv141b.vincent.iastate.edu>
- Date: Wed, 30 Dec 1992 23:32:38 GMT
- Lines: 22
-
- >In <C01LuI.542@news.cso.uiuc.edu> (Mike Berger) writes:
- >
- >>Do you have any reason to believe this is really the case? It would be
- >>very costly for Intel to test ALL chips. Usually they're sampled from
- >>batches. If one sample chip fails at the higher speed and passes at the
- >>lower speed, then the whole batch is designated for the lower speed. So
- >>chances are good that some will function at faster clock speeds.
- >
-
- I work in lithography R&D, so I am not intimately familiar with the
- sort and test world, but I know that every chip sold is tested. Usually,
- once the lot of wafers leaves the fabrication line, every chip on each wafer
- is tested for functionality as function of voltage and speed. There may be
- other tests done at this stage as well, like transistor characteristics, etc.
- and maybe others that I am not aware of. All chips that do not work are
- inked, so when the wafer is diced into individual chips, the inked fellas are
- rejected summarily.
-
-
- --
- Sam Sivakumar | Killer shrew, killer shrew,
- ssivakum@ptdcs5.intel.com | K-I-L-L-ER Shrew !
-