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- Path: sparky!uunet!spool.mu.edu!hri.com!noc.near.net!transfer.stratus.com!sw.stratus.com!dswartz
- From: dswartz@sw.stratus.com (Dan Swartzendruber)
- Newsgroups: comp.arch
- Subject: Re: branch-and-link
- Message-ID: <1i30jrINNqd0@transfer.stratus.com>
- Date: 2 Jan 93 03:02:19 GMT
- References: <1hkqk3INNsns@transfer.stratus.com> <GLEW.92Dec31162920@pdx007.intel.com>
- Organization: Stratus Computer, Inc.
- Lines: 24
- NNTP-Posting-Host: redondo.sw.stratus.com
-
- In article <GLEW.92Dec31162920@pdx007.intel.com>, glew@pdx007.intel.com (Andy Glew) writes:
- >
-
- [deleted]
-
- >
- > Other, quite reasonable, microarchitectures can't do it at all without
- > slowing down (or requiring a PC to be attached to every instruction as
- > it flows through the pipe).
- >
- > When you can do it, great! But don't slow down other implementations
- > for a debug feature that is not in use most of the time.
- >
-
- Maybe I'm missing something here. I only care about the last xfer-of-control instruction
- which was actually executed before an exception occurred. Given that, I'm not sure why
- you care about any intermediate state of instructions in the pipeline.
-
-
- --
-
- #include <std_disclaimer.h>
-
- Dan S.
-