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- From: caj8106@rccnxt1.tamu.edu (Curtis Johnson)
- Newsgroups: comp.sys.next.misc
- Subject: Re: 100 Mips Intel NeXT.
- Date: 14 Dec 1992 05:47:25 GMT
- Organization: Texas A&M University, College Station, TX
- Lines: 45
- Distribution: world
- Message-ID: <1gh75dINNhl1@tamsun.tamu.edu>
- References: <mike.724093217@starburst.umd.edu>
- NNTP-Posting-Host: rccnxt1.tamu.edu
-
- In article <mike.724093217@starburst.umd.edu> mike@starburst.umd.edu
- (Michael F. Santangelo) writes:
- > lschultz@pdx255 (Leonard Schultz) writes:
- >
- >
- > >In article <1992Dec8.205422.746@qb.rhein-main.de> vhs@rhein-main.de
- writes:
- >
- > >Ah, from a sexy/horsepower point of view, we would all like to see
- this.
- > >Wouldn't we? But let's look at the realities of this, which NeXT must
- > >face. PA-RISC is a proprietary processor. So if NeXT designs a
- system,
- > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-
- In the case of which chip to use, I think that NeXT is doing the right
- thing. We must remember that the only thing that is keeping NeXT from
- blowing everyone away is shrinkwrapped apps. Porting to the Intel chip
- should give developers a chance to right for the NeXT platform. If
- nothing more, NeXT can use Intel to get the developer support it needs.
-
- <dream sequence>
- If I were running NeXT I would stay with the Moto chip for a low end line
- of machines (but cut the price to almost a 0 profit margin, just to boost
- sales), build a PA-RISC box :) for the high end (something that can have
- up to 4 processors, similar to the SUN 10).
-
- I would then make ports in the following order.
-
- Intel In the bag
- PA-RISC Build black PA-RISC boxes, yeah!
- SPARC The people have spoken!
- RS/6000 IBM dropped the ball on this one!
- ALPHA SGI w/NeXTstep whoa!
- PowerPC After all the above have been port
- ed PowerPC should just be coming
- onto the scene (in 5years maybe).
-
- Just the way I'd do it.
-
- --
- Curtis A. Johnson
- caj8106@tamsun.tamu.edu
- NeXTmail Accepted
-